From mboxrd@z Thu Jan 1 00:00:00 1970 From: Alexandre Courbot Subject: Re: [PATCH v2 2/3] drm/ttm: introduce dma cache sync helpers Date: Tue, 24 Jun 2014 19:33:10 +0900 Message-ID: <53A953E6.2030503@nvidia.com> References: <1403603667-11302-1-git-send-email-acourbot@nvidia.com> <1403603667-11302-3-git-send-email-acourbot@nvidia.com> <20140624100220.GK32514@n2100.arm.linux.org.uk> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8"; Format="flowed" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <20140624100220.GK32514@n2100.arm.linux.org.uk> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Russell King - ARM Linux Cc: "gnurou@gmail.com" , "nouveau@lists.freedesktop.org" , "linux-kernel@vger.kernel.org" , "dri-devel@lists.freedesktop.org" , Ben Skeggs , "linux-tegra@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" List-Id: linux-tegra@vger.kernel.org T24gMDYvMjQvMjAxNCAwNzowMiBQTSwgUnVzc2VsbCBLaW5nIC0gQVJNIExpbnV4IHdyb3RlOgo+ IE9uIFR1ZSwgSnVuIDI0LCAyMDE0IGF0IDA2OjU0OjI2UE0gKzA5MDAsIEFsZXhhbmRyZSBDb3Vy Ym90IHdyb3RlOgo+PiBGcm9tOiBMdWNhcyBTdGFjaCA8ZGV2QGx5bnhleWUuZGU+Cj4+Cj4+IE9u IGFyY2hpdGVjdHVyZXMgZm9yIHdoaWNoIGFjY2VzcyB0byBHUFUgbWVtb3J5IGlzIG5vbi1jb2hl cmVudCwKPj4gY2FjaGVzIG5lZWQgdG8gYmUgZmx1c2hlZCBhbmQgaW52YWxpZGF0ZWQgZXhwbGlj aXRseSBhdCB0aGUKPj4gYXBwcm9wcmlhdGUgcGxhY2VzLiBJbnRyb2R1Y2UgdHdvIHNtYWxsIGhl bHBlcnMgdG8gbWFrZSB0aGluZ3MKPj4gZWFzeSBmb3IgVFRNLWJhc2VkIGRyaXZlcnMuCj4KPiBI YXZlIHlvdSBydW4gdGhpcyB3aXRoIERNQSBBUEkgZGVidWdnaW5nIGVuYWJsZWQ/ICBJIHN1c3Bl Y3QgeW91IGhhdmVuJ3QsCj4gYW5kIEkgcmVjb21tZW5kIHRoYXQgeW91IGRvLgoKIyBjYXQgL3N5 cy9rZXJuZWwvZGVidWcvZG1hLWFwaS9lcnJvcl9jb3VudAoxNjI2MjEKCijila/CsOKWocKw77yJ 4pWv77i1IOKUu+KUgeKUuykKCl9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fCmRyaS1kZXZlbCBtYWlsaW5nIGxpc3QKZHJpLWRldmVsQGxpc3RzLmZyZWVkZXNr dG9wLm9yZwpodHRwOi8vbGlzdHMuZnJlZWRlc2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8vZHJp LWRldmVsCg== From mboxrd@z Thu Jan 1 00:00:00 1970 From: acourbot@nvidia.com (Alexandre Courbot) Date: Tue, 24 Jun 2014 19:33:10 +0900 Subject: [PATCH v2 2/3] drm/ttm: introduce dma cache sync helpers In-Reply-To: <20140624100220.GK32514@n2100.arm.linux.org.uk> References: <1403603667-11302-1-git-send-email-acourbot@nvidia.com> <1403603667-11302-3-git-send-email-acourbot@nvidia.com> <20140624100220.GK32514@n2100.arm.linux.org.uk> Message-ID: <53A953E6.2030503@nvidia.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On 06/24/2014 07:02 PM, Russell King - ARM Linux wrote: > On Tue, Jun 24, 2014 at 06:54:26PM +0900, Alexandre Courbot wrote: >> From: Lucas Stach >> >> On architectures for which access to GPU memory is non-coherent, >> caches need to be flushed and invalidated explicitly at the >> appropriate places. Introduce two small helpers to make things >> easy for TTM-based drivers. > > Have you run this with DMA API debugging enabled? I suspect you haven't, > and I recommend that you do. # cat /sys/kernel/debug/dma-api/error_count 162621 (??????? ???) From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753074AbaFXKdR (ORCPT ); Tue, 24 Jun 2014 06:33:17 -0400 Received: from hqemgate14.nvidia.com ([216.228.121.143]:12570 "EHLO hqemgate14.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751713AbaFXKdQ convert rfc822-to-8bit (ORCPT ); Tue, 24 Jun 2014 06:33:16 -0400 X-PGP-Universal: processed; by hqnvupgp07.nvidia.com on Tue, 24 Jun 2014 03:23:29 -0700 Message-ID: <53A953E6.2030503@nvidia.com> Date: Tue, 24 Jun 2014 19:33:10 +0900 From: Alexandre Courbot Organization: NVIDIA User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:24.0) Gecko/20100101 Thunderbird/24.6.0 MIME-Version: 1.0 To: Russell King - ARM Linux CC: David Airlie , Ben Skeggs , Lucas Stach , Thierry Reding , "gnurou@gmail.com" , "nouveau@lists.freedesktop.org" , "linux-kernel@vger.kernel.org" , "dri-devel@lists.freedesktop.org" , "linux-tegra@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" Subject: Re: [PATCH v2 2/3] drm/ttm: introduce dma cache sync helpers References: <1403603667-11302-1-git-send-email-acourbot@nvidia.com> <1403603667-11302-3-git-send-email-acourbot@nvidia.com> <20140624100220.GK32514@n2100.arm.linux.org.uk> In-Reply-To: <20140624100220.GK32514@n2100.arm.linux.org.uk> X-NVConfidentiality: public Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 8BIT Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 06/24/2014 07:02 PM, Russell King - ARM Linux wrote: > On Tue, Jun 24, 2014 at 06:54:26PM +0900, Alexandre Courbot wrote: >> From: Lucas Stach >> >> On architectures for which access to GPU memory is non-coherent, >> caches need to be flushed and invalidated explicitly at the >> appropriate places. Introduce two small helpers to make things >> easy for TTM-based drivers. > > Have you run this with DMA API debugging enabled? I suspect you haven't, > and I recommend that you do. # cat /sys/kernel/debug/dma-api/error_count 162621 (╯°□°）╯︵ ┻━┻)