From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46873) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WzRKE-0007xj-Eb for qemu-devel@nongnu.org; Tue, 24 Jun 2014 10:04:00 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WzRK8-0008La-70 for qemu-devel@nongnu.org; Tue, 24 Jun 2014 10:03:54 -0400 Received: from mailapp01.imgtec.com ([195.59.15.196]:16998) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WzRK8-0008LL-1k for qemu-devel@nongnu.org; Tue, 24 Jun 2014 10:03:48 -0400 Message-ID: <53A98541.7010303@imgtec.com> Date: Tue, 24 Jun 2014 15:03:45 +0100 From: Leon Alrae MIME-Version: 1.0 References: <1402499992-64851-1-git-send-email-leon.alrae@imgtec.com> <1402499992-64851-14-git-send-email-leon.alrae@imgtec.com> <53988959.2090803@twiddle.net> In-Reply-To: <53988959.2090803@twiddle.net> Content-Type: text/plain; charset="ISO-8859-1" Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH v2 13/22] target-mips: add Compact Branches List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Richard Henderson , qemu-devel@nongnu.org Cc: yongbok.kim@imgtec.com, cristian.cuna@imgtec.com, aurelien@aurel32.net On 11/06/2014 17:52, Richard Henderson wrote: > On 06/11/2014 08:19 AM, Leon Alrae wrote: >> + case OPC_BEQZC: >> + tcg_gen_setcondi_tl(TCG_COND_EQ, bcond, t0, 0); >> + break; > ... >> + /* Compact branches don't have delay slot, thus generating branch here */ >> + /* TODO: implement forbidden slot */ >> + gen_branch(ctx, 4); > > This is not what I meant by generating a branch directly. > > I meant generating > > tcg_gen_brcondi(TCG_COND_EQ, t0, 0, label) > > instead of computing setcond into bcond and then branching off a comparison > against bcond. Ah, now I see. > Consider creating some sort of structure that defines a condition for the > translator, much like target-s390x does with struct DisasCompare or target-i386 > does with struct CCPrepare. > > That lets "old" branches set up a condition based off bcond, and your new > branches set up a condition based off the general registers (or brand new temps > in the case of BOVC/BNVC). > > The ability to select the TCG compare op also allows you to avoid things like > the xor at the end of your BNVC computation. My understanding is that this is a nice to have MIPS branch improvement that can come later? I would prefer to avoid mixing this new work (which also affects pre-R6 branches) into the current patchset. So I'm going just to use tcg_gen_brcond in compact conditional branches directly as you suggested initially. Thanks, Leon