From: Diana Craciun <diana.craciun@freescale.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 1/4] ARM: fix the ARCH Timer frequency setting.
Date: Thu, 3 Jul 2014 14:23:45 +0300 [thread overview]
Message-ID: <53B53D41.8050304@freescale.com> (raw)
In-Reply-To: <1404381072-42875-2-git-send-email-Li.Xiubo@freescale.com>
On 07/03/2014 12:51 PM, Xiubo Li wrote:
> For some SoCs, the CONFIG_SYS_CLK_FREQ maybe won't equal the ARCH
> Timer's frequency.
Can you give an example?
> Here using the CONFIG_TIMER_CLK_FREQ instead if the ARCH Timer's
> frequency need to config here.
>
> Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
> ---
> arch/arm/cpu/armv7/nonsec_virt.S | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/cpu/armv7/nonsec_virt.S b/arch/arm/cpu/armv7/nonsec_virt.S
> index 6f90988..e9766c0 100644
> --- a/arch/arm/cpu/armv7/nonsec_virt.S
> +++ b/arch/arm/cpu/armv7/nonsec_virt.S
> @@ -147,11 +147,11 @@ ENTRY(_nonsec_init)
> * we do this here instead.
> * But first check if we have the generic timer.
> */
> -#ifdef CONFIG_SYS_CLK_FREQ
> +#ifdef CONFIG_TIMER_CLK_FREQ
Aren't you breaking the boards which rely on CONFIG_SYS_CLK_FREQ ?
> mrc p15, 0, r0, c0, c1, 1 @ read ID_PFR1
> and r0, r0, #CPUID_ARM_GENTIMER_MASK @ mask arch timer bits
> cmp r0, #(1 << CPUID_ARM_GENTIMER_SHIFT)
> - ldreq r1, =CONFIG_SYS_CLK_FREQ
> + ldreq r1, =CONFIG_TIMER_CLK_FREQ
> mcreq p15, 0, r1, c14, c0, 0 @ write CNTFRQ
> #endif
>
Diana
next prev parent reply other threads:[~2014-07-03 11:23 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-07-03 9:51 [U-Boot] [PATCH 0/4] Add LS1021A-QDS/TWR Non-secure and HYP support Xiubo Li
2014-07-03 9:51 ` [U-Boot] [PATCH 1/4] ARM: fix the ARCH Timer frequency setting Xiubo Li
2014-07-03 11:23 ` Diana Craciun [this message]
2014-07-04 1:43 ` Li.Xiubo at freescale.com
2014-07-04 9:45 ` Diana Craciun
2014-07-03 9:51 ` [U-Boot] [PATCH 2/4] ARM: add the pen address byte reverting support Xiubo Li
2014-07-03 9:51 ` [U-Boot] [PATCH 3/4] ARM: LS1021A: enable ARMv7 virt support for LS1021A A7 Xiubo Li
2014-07-03 11:43 ` Diana Craciun
2014-07-04 1:48 ` Li.Xiubo at freescale.com
2014-07-04 11:35 ` Diana Craciun
2014-07-07 1:56 ` Li.Xiubo at freescale.com
2014-07-03 9:51 ` [U-Boot] [PATCH 4/4] ARM: LS1021A: to allow non-secure R/W access for all devices' mapped region Xiubo Li
2014-07-03 11:58 ` Diana Craciun
2014-07-04 1:49 ` Li.Xiubo at freescale.com
2014-07-03 11:14 ` [U-Boot] [PATCH 0/4] Add LS1021A-QDS/TWR Non-secure and HYP support Diana Craciun
2014-07-04 1:31 ` Li.Xiubo at freescale.com
2014-07-04 11:39 ` Diana Craciun
2014-07-07 3:46 ` Li.Xiubo at freescale.com
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