From: Julien Grall <julien.grall@linaro.org>
To: Ian Campbell <Ian.Campbell@citrix.com>
Cc: xen-devel@lists.xenproject.org, tim@xen.org,
stefano.stabellini@citrix.com
Subject: Re: [PATCH] xen/arm: Correctly support WARN_ON
Date: Thu, 03 Jul 2014 13:33:37 +0100 [thread overview]
Message-ID: <53B54DA1.3000506@linaro.org> (raw)
In-Reply-To: <1404383420.14865.53.camel@kazak.uk.xensource.com>
Hi Ian,
On 07/03/2014 11:30 AM, Ian Campbell wrote:
> On Tue, 2014-07-01 at 19:51 +0100, Julien Grall wrote:
>
>> TODO:
>> I haven't yet hook the code on ARM64 as I'm not sure how undefined
>> instruction are handled. It looks like there is multiple way to get it
>> via HSR.
>
> I think EC==0x00 (the catchall) is where it will end up "The attempted
> execution of an instruction bit patterns that has no allocated
> instruction at the current Exception level".
So if EC==0x00 I can safely assume this is a undefined instruction
exception, right?
>> +/* ARM doesn't provide any undefined instruction, make our own based on
>> + * a combination of bits which is not used by the instruction set
>> + */
>> +#define BUG_INSTR 0xe7f000f0
>
> Linux uses 0xe7f001f2. I'm not sure what the difference is but it seems
> safer to follow suit.
Linux uses multiple different undefined opcode (bug, debugger,...). This
value is already used in Xen by dump_execution_state (see
include/asm-arm/processor.h).
I don't see why we should change it.
Regards,
--
Julien Grall
next prev parent reply other threads:[~2014-07-03 12:33 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-07-01 18:51 [PATCH] xen/arm: Correctly support WARN_ON Julien Grall
2014-07-03 10:30 ` Ian Campbell
2014-07-03 12:33 ` Julien Grall [this message]
2014-07-03 13:44 ` Ian Campbell
2014-07-10 15:06 ` Ian Campbell
2014-07-10 15:07 ` Julien Grall
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