From mboxrd@z Thu Jan 1 00:00:00 1970 From: David Vrabel Subject: Re: [PATCH v3 4/6] xen/PMU: Describe vendor-specific PMU registers Date: Fri, 4 Jul 2014 11:41:37 +0100 Message-ID: <53B684E1.2050106@citrix.com> References: <1404414899-1773-1-git-send-email-boris.ostrovsky@oracle.com> <1404414899-1773-5-git-send-email-boris.ostrovsky@oracle.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1404414899-1773-5-git-send-email-boris.ostrovsky@oracle.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Boris Ostrovsky , konrad.wilk@oracle.com Cc: andrew.cooper3@citrix.com, kevin.tian@intel.com, dietmar.hahn@ts.fujitsu.com, jbeulich@suse.com, xen-devel@lists.xen.org List-Id: xen-devel@lists.xenproject.org On 03/07/14 20:14, Boris Ostrovsky wrote: > AMD and Intel PMU register initialization and helpers that determine whether a > register belongs to PMU. > > This and some of subsequent PMU emulation code is somewhat similar to Xen's PMU > implementation. > I trust that the hardware bit are correct. Reviewed-by: David Vrabel Although I wonder if a lookup table might be better than the chain of ifs. David