From mboxrd@z Thu Jan  1 00:00:00 1970
From: Julien Grall <julien.grall@linaro.org>
Subject: Re: [PATCH v7 5/6] xen/arm: physical irq follow virtual
 irq
Date: Fri, 04 Jul 2014 11:51:02 +0100
Message-ID: <53B68716.2020800@linaro.org>
References: <alpine.DEB.2.02.1407031546180.11722@kaball.uk.xensource.com>
	<1404406394-18231-5-git-send-email-stefano.stabellini@eu.citrix.com>
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To: Stefano Stabellini <stefano.stabellini@eu.citrix.com>, xen-devel@lists.xensource.com
Cc: julien.grall@citrix.com, Ian.Campbell@citrix.com
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On 07/03/2014 05:53 PM, Stefano Stabellini wrote:
> diff --git a/xen/arch/arm/gic-v2.c b/xen/arch/arm/gic-v2.c
> index 695c232..c3d2853 100644
> --- a/xen/arch/arm/gic-v2.c
> +++ b/xen/arch/arm/gic-v2.c
> @@ -532,9 +532,22 @@ static void gicv2_guest_irq_end(struct irq_desc *desc)
>      /* Deactivation happens in maintenance interrupt / via GICV */
>  }
>  
> -static void gicv2_irq_set_affinity(struct irq_desc *desc, const cpumask_t *mask)
> +static void gicv2_irq_set_affinity(struct irq_desc *desc, const cpumask_t *cpu_mask)
>  {
> -    BUG();
> +    volatile unsigned char *bytereg;
> +    unsigned int mask;
> +
> +    ASSERT(!cpumask_empty(cpu_mask));
> +
> +    spin_lock(&gicv2.lock);
> +
> +    mask = gicv2_cpu_mask(cpu_mask);
> +
> +    /* Set target CPU mask (RAZ/WI on uniprocessor) */
> +    bytereg = (unsigned char *) (GICD + GICD_ITARGETSR);
> +    bytereg[desc->irq] = mask;

The new implemenation of GICv2 is using {read,write}* helpers. Can you
use writeb_relaxed here, please?

[..]

> diff --git a/xen/arch/arm/vgic.c b/xen/arch/arm/vgic.c
> index b4493a3..69d3040 100644
> --- a/xen/arch/arm/vgic.c
> +++ b/xen/arch/arm/vgic.c
> @@ -399,6 +399,7 @@ static void vgic_migrate_irq(struct vcpu *old, struct vcpu *new, unsigned int ir
>  
>      if ( list_empty(&p->inflight) )
>      {
> +        irq_set_affinity(p->desc, cpumask_of(new->processor));
>          spin_unlock_irqrestore(&old->arch.vgic.lock, flags);
>          return;
>      }
> @@ -407,6 +408,7 @@ static void vgic_migrate_irq(struct vcpu *old, struct vcpu *new, unsigned int ir
>      {
>          list_del_init(&p->lr_queue);
>          list_del_init(&p->inflight);
> +        irq_set_affinity(p->desc, cpumask_of(new->processor));

I think this irq_set_affinity is misplaced. You forgot to handle the
case where the IRQ has been EOIed, and no IRQ has been queued.

Also, it looks like this is done a bit late. the IRQ may fire on the
previous physical CPU again at least once.

This will happen the X-Gene quirk.

Regards,

-- 
Julien Grall