From: Diana Craciun <diana.craciun@freescale.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 3/4] ARM: LS1021A: enable ARMv7 virt support for LS1021A A7
Date: Fri, 4 Jul 2014 14:35:08 +0300 [thread overview]
Message-ID: <53B6916C.9000207@freescale.com> (raw)
In-Reply-To: <0da18798e125486f8aff8f990f45a6a0@BY2PR03MB505.namprd03.prod.outlook.com>
On 07/04/2014 04:48 AM, Xiubo Li-B47053 wrote:
>>> diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h
>>> index d639a6f..f090971 100644
>>> --- a/include/configs/ls1021aqds.h
>>> +++ b/include/configs/ls1021aqds.h
>>> @@ -18,6 +18,15 @@
>>> #define CONFIG_BOARD_EARLY_INIT_F
>>> #define CONFIG_ARCH_EARLY_INIT_R
>>>
>>> +#define CONFIG_ARMV7_NONSEC
>>> +#define CONFIG_ARMV7_VIRT
>>> +#define CONFIG_SOC_BIG_ENDIAN
>>> +#define CONFIG_DCFG_CCSR_SCRATCHRW1 0x01ee0200
>>> +#define CONFIG_DCFG_CCSR_BRR 0x01ee00e4
>> Why are you hardcoding the register addresses in this file? I saw that
>> all registers are defined in:
>> arch/arm/include/asm/arch-ls102xa/config.h. Why are these special?
>>
> No special, and I'll follow your advice.
>
>
>>> +#define CONFIG_SMP_PEN_ADDR CONFIG_DCFG_CCSR_SCRATCHRW1
>>> +#define CONFIG_ARM_GIC_BASE_ADDRESS 0x01400000
>> Why do you need the GIC base address? Can't this be read from CBAR?
>>
> I'm not very sure, I have tried, but failed, I will do some research later.
What is not working? Is the address returned by CBAR wrong?
Diana
next prev parent reply other threads:[~2014-07-04 11:35 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-07-03 9:51 [U-Boot] [PATCH 0/4] Add LS1021A-QDS/TWR Non-secure and HYP support Xiubo Li
2014-07-03 9:51 ` [U-Boot] [PATCH 1/4] ARM: fix the ARCH Timer frequency setting Xiubo Li
2014-07-03 11:23 ` Diana Craciun
2014-07-04 1:43 ` Li.Xiubo at freescale.com
2014-07-04 9:45 ` Diana Craciun
2014-07-03 9:51 ` [U-Boot] [PATCH 2/4] ARM: add the pen address byte reverting support Xiubo Li
2014-07-03 9:51 ` [U-Boot] [PATCH 3/4] ARM: LS1021A: enable ARMv7 virt support for LS1021A A7 Xiubo Li
2014-07-03 11:43 ` Diana Craciun
2014-07-04 1:48 ` Li.Xiubo at freescale.com
2014-07-04 11:35 ` Diana Craciun [this message]
2014-07-07 1:56 ` Li.Xiubo at freescale.com
2014-07-03 9:51 ` [U-Boot] [PATCH 4/4] ARM: LS1021A: to allow non-secure R/W access for all devices' mapped region Xiubo Li
2014-07-03 11:58 ` Diana Craciun
2014-07-04 1:49 ` Li.Xiubo at freescale.com
2014-07-03 11:14 ` [U-Boot] [PATCH 0/4] Add LS1021A-QDS/TWR Non-secure and HYP support Diana Craciun
2014-07-04 1:31 ` Li.Xiubo at freescale.com
2014-07-04 11:39 ` Diana Craciun
2014-07-07 3:46 ` Li.Xiubo at freescale.com
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