* [PATCH 2/2] xen/arm: Fix PLATFORM_QUIRK_GIC_64K_STRIDE
@ 2014-07-09 11:54 Ian Campbell
2014-07-09 11:56 ` Ian Campbell
2014-07-09 12:11 ` Julien Grall
0 siblings, 2 replies; 3+ messages in thread
From: Ian Campbell @ 2014-07-09 11:54 UTC (permalink / raw)
To: xen-devel
Cc: Ian Campbell, Anup Patel, stefano.stabellini, Vijaya Kumar K,
julien.grall, tim, Pranavkumar Sawargaonkar
The patch "xen/arm: use ioremap to map gic-v2 registers" handled this
quirk by mapping a 64K+1 page region, but the code continued to
assume that GICC_DIR was at offset 0x1000 from the start of the
mapping.
Fix this by mapping both pages of the GICC space independently and
adjusting the accessor function to use the correct page.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Cc: Vijaya Kumar K <Vijaya.Kumar@caviumnetworks.com>
Cc: Pranavkumar Sawargaonkar <pranavkumar@linaro.org>
Cc: Anup Patel <anup.patel@linaro.org>
---
xen/arch/arm/gic-v2.c | 17 ++++++++++++-----
1 file changed, 12 insertions(+), 5 deletions(-)
diff --git a/xen/arch/arm/gic-v2.c b/xen/arch/arm/gic-v2.c
index 3820be5..6cee883 100644
--- a/xen/arch/arm/gic-v2.c
+++ b/xen/arch/arm/gic-v2.c
@@ -65,7 +65,7 @@ static struct {
paddr_t dbase; /* Address of distributor registers */
void __iomem * map_dbase; /* IO mapped Address of distributor registers */
paddr_t cbase; /* Address of CPU interface registers */
- void __iomem * map_cbase; /* IO mapped Address of CPU interface registers */
+ void __iomem * map_cbase[2]; /* IO mapped Address of CPU interface registers */
paddr_t hbase; /* Address of virtual interface registers */
void __iomem * map_hbase; /* IO Address of virtual interface registers */
paddr_t vbase; /* Address of virtual cpu interface registers */
@@ -100,12 +100,16 @@ static inline uint32_t readl_gicd(int offset)
static inline void writel_gicc(uint32_t val, int offset)
{
- writel_relaxed(val, gicv2.map_cbase + offset);
+ int page = offset >> PAGE_SHIFT;
+ offset &= ~PAGE_MASK;
+ writel_relaxed(val, gicv2.map_cbase[page] + offset);
}
static inline uint32_t readl_gicc(int offset)
{
- return readl_relaxed(gicv2.map_cbase + offset);
+ int page = offset >> PAGE_SHIFT;
+ offset &= ~PAGE_MASK;
+ return readl_relaxed(gicv2.map_cbase[page] + offset);
}
static inline void writel_gich(uint32_t val, int offset)
@@ -665,10 +669,13 @@ static int __init gicv2_init(struct dt_device_node *node, const void *data)
if ( !gicv2.map_dbase )
panic("GICv2: Failed to ioremap for GIC distributor\n");
+ gicv2.map_cbase[0] = ioremap_nocache(gicv2.cbase, PAGE_SIZE);
+
if ( platform_has_quirk(PLATFORM_QUIRK_GIC_64K_STRIDE) )
- gicv2.map_cbase = ioremap_nocache(gicv2.cbase, PAGE_SIZE * 0x10);
+ gicv2.map_cbase[1] = ioremap_nocache(gicv2.cbase + PAGE_SIZE * 0x10,
+ PAGE_SIZE);
else
- gicv2.map_cbase = ioremap_nocache(gicv2.cbase, PAGE_SIZE * 2);
+ gicv2.map_cbase[1] = ioremap_nocache(gicv2.cbase + PAGE_SIZE, PAGE_SIZE);
if ( !gicv2.map_cbase )
panic("GICv2: Failed to ioremap for GIC CPU interface\n");
--
1.7.10.4
^ permalink raw reply related [flat|nested] 3+ messages in thread* Re: [PATCH 2/2] xen/arm: Fix PLATFORM_QUIRK_GIC_64K_STRIDE
2014-07-09 11:54 [PATCH 2/2] xen/arm: Fix PLATFORM_QUIRK_GIC_64K_STRIDE Ian Campbell
@ 2014-07-09 11:56 ` Ian Campbell
2014-07-09 12:11 ` Julien Grall
1 sibling, 0 replies; 3+ messages in thread
From: Ian Campbell @ 2014-07-09 11:56 UTC (permalink / raw)
To: xen-devel
Cc: Anup Patel, stefano.stabellini, Vijaya Kumar K, julien.grall, tim,
Pranavkumar Sawargaonkar
Sorry, this was supposed to be threaded onto "[PATCH 1/2] xen/arm:
Introduce accessors for GICv2 MMIO reads/writes" but I messed up my git
send-email invocation.
Ian.
On Wed, 2014-07-09 at 12:54 +0100, Ian Campbell wrote:
> The patch "xen/arm: use ioremap to map gic-v2 registers" handled this
> quirk by mapping a 64K+1 page region, but the code continued to
> assume that GICC_DIR was at offset 0x1000 from the start of the
> mapping.
>
> Fix this by mapping both pages of the GICC space independently and
> adjusting the accessor function to use the correct page.
>
> Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
> Cc: Vijaya Kumar K <Vijaya.Kumar@caviumnetworks.com>
> Cc: Pranavkumar Sawargaonkar <pranavkumar@linaro.org>
> Cc: Anup Patel <anup.patel@linaro.org>
> ---
> xen/arch/arm/gic-v2.c | 17 ++++++++++++-----
> 1 file changed, 12 insertions(+), 5 deletions(-)
>
> diff --git a/xen/arch/arm/gic-v2.c b/xen/arch/arm/gic-v2.c
> index 3820be5..6cee883 100644
> --- a/xen/arch/arm/gic-v2.c
> +++ b/xen/arch/arm/gic-v2.c
> @@ -65,7 +65,7 @@ static struct {
> paddr_t dbase; /* Address of distributor registers */
> void __iomem * map_dbase; /* IO mapped Address of distributor registers */
> paddr_t cbase; /* Address of CPU interface registers */
> - void __iomem * map_cbase; /* IO mapped Address of CPU interface registers */
> + void __iomem * map_cbase[2]; /* IO mapped Address of CPU interface registers */
> paddr_t hbase; /* Address of virtual interface registers */
> void __iomem * map_hbase; /* IO Address of virtual interface registers */
> paddr_t vbase; /* Address of virtual cpu interface registers */
> @@ -100,12 +100,16 @@ static inline uint32_t readl_gicd(int offset)
>
> static inline void writel_gicc(uint32_t val, int offset)
> {
> - writel_relaxed(val, gicv2.map_cbase + offset);
> + int page = offset >> PAGE_SHIFT;
> + offset &= ~PAGE_MASK;
> + writel_relaxed(val, gicv2.map_cbase[page] + offset);
> }
>
> static inline uint32_t readl_gicc(int offset)
> {
> - return readl_relaxed(gicv2.map_cbase + offset);
> + int page = offset >> PAGE_SHIFT;
> + offset &= ~PAGE_MASK;
> + return readl_relaxed(gicv2.map_cbase[page] + offset);
> }
>
> static inline void writel_gich(uint32_t val, int offset)
> @@ -665,10 +669,13 @@ static int __init gicv2_init(struct dt_device_node *node, const void *data)
> if ( !gicv2.map_dbase )
> panic("GICv2: Failed to ioremap for GIC distributor\n");
>
> + gicv2.map_cbase[0] = ioremap_nocache(gicv2.cbase, PAGE_SIZE);
> +
> if ( platform_has_quirk(PLATFORM_QUIRK_GIC_64K_STRIDE) )
> - gicv2.map_cbase = ioremap_nocache(gicv2.cbase, PAGE_SIZE * 0x10);
> + gicv2.map_cbase[1] = ioremap_nocache(gicv2.cbase + PAGE_SIZE * 0x10,
> + PAGE_SIZE);
> else
> - gicv2.map_cbase = ioremap_nocache(gicv2.cbase, PAGE_SIZE * 2);
> + gicv2.map_cbase[1] = ioremap_nocache(gicv2.cbase + PAGE_SIZE, PAGE_SIZE);
>
> if ( !gicv2.map_cbase )
> panic("GICv2: Failed to ioremap for GIC CPU interface\n");
^ permalink raw reply [flat|nested] 3+ messages in thread* Re: [PATCH 2/2] xen/arm: Fix PLATFORM_QUIRK_GIC_64K_STRIDE
2014-07-09 11:54 [PATCH 2/2] xen/arm: Fix PLATFORM_QUIRK_GIC_64K_STRIDE Ian Campbell
2014-07-09 11:56 ` Ian Campbell
@ 2014-07-09 12:11 ` Julien Grall
1 sibling, 0 replies; 3+ messages in thread
From: Julien Grall @ 2014-07-09 12:11 UTC (permalink / raw)
To: Ian Campbell, xen-devel
Cc: Vijaya Kumar K, Pranavkumar Sawargaonkar, tim, Anup Patel,
stefano.stabellini
Hi Ian,
On 07/09/2014 12:54 PM, Ian Campbell wrote:
> The patch "xen/arm: use ioremap to map gic-v2 registers" handled this
> quirk by mapping a 64K+1 page region, but the code continued to
> assume that GICC_DIR was at offset 0x1000 from the start of the
> mapping.
I should have reviewed closer this patch, good catch!
> Fix this by mapping both pages of the GICC space independently and
> adjusting the accessor function to use the correct page.
>
> Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
> Cc: Vijaya Kumar K <Vijaya.Kumar@caviumnetworks.com>
> Cc: Pranavkumar Sawargaonkar <pranavkumar@linaro.org>
> Cc: Anup Patel <anup.patel@linaro.org>
> ---
> xen/arch/arm/gic-v2.c | 17 ++++++++++++-----
> 1 file changed, 12 insertions(+), 5 deletions(-)
>
> diff --git a/xen/arch/arm/gic-v2.c b/xen/arch/arm/gic-v2.c
> index 3820be5..6cee883 100644
> --- a/xen/arch/arm/gic-v2.c
> +++ b/xen/arch/arm/gic-v2.c
> @@ -65,7 +65,7 @@ static struct {
> paddr_t dbase; /* Address of distributor registers */
> void __iomem * map_dbase; /* IO mapped Address of distributor registers */
> paddr_t cbase; /* Address of CPU interface registers */
> - void __iomem * map_cbase; /* IO mapped Address of CPU interface registers */
> + void __iomem * map_cbase[2]; /* IO mapped Address of CPU interface registers */
> paddr_t hbase; /* Address of virtual interface registers */
> void __iomem * map_hbase; /* IO Address of virtual interface registers */
> paddr_t vbase; /* Address of virtual cpu interface registers */
> @@ -100,12 +100,16 @@ static inline uint32_t readl_gicd(int offset)
>
> static inline void writel_gicc(uint32_t val, int offset)
> {
> - writel_relaxed(val, gicv2.map_cbase + offset);
> + int page = offset >> PAGE_SHIFT;
unsigned int?
> + offset &= ~PAGE_MASK;
> + writel_relaxed(val, gicv2.map_cbase[page] + offset);
> }
>
> static inline uint32_t readl_gicc(int offset)
> {
> - return readl_relaxed(gicv2.map_cbase + offset);
> + int page = offset >> PAGE_SHIFT;
same here.
> + offset &= ~PAGE_MASK;
> + return readl_relaxed(gicv2.map_cbase[page] + offset);
> }
>
> static inline void writel_gich(uint32_t val, int offset)
> @@ -665,10 +669,13 @@ static int __init gicv2_init(struct dt_device_node *node, const void *data)
> if ( !gicv2.map_dbase )
> panic("GICv2: Failed to ioremap for GIC distributor\n");
>
> + gicv2.map_cbase[0] = ioremap_nocache(gicv2.cbase, PAGE_SIZE);
> +
> if ( platform_has_quirk(PLATFORM_QUIRK_GIC_64K_STRIDE) )
> - gicv2.map_cbase = ioremap_nocache(gicv2.cbase, PAGE_SIZE * 0x10);
> + gicv2.map_cbase[1] = ioremap_nocache(gicv2.cbase + PAGE_SIZE * 0x10,
> + PAGE_SIZE);
> else
> - gicv2.map_cbase = ioremap_nocache(gicv2.cbase, PAGE_SIZE * 2);
> + gicv2.map_cbase[1] = ioremap_nocache(gicv2.cbase + PAGE_SIZE, PAGE_SIZE);
>
> if ( !gicv2.map_cbase )
This test is now wrong. You have to check both map_cbase[0] and
map_cbase[1].
> panic("GICv2: Failed to ioremap for GIC CPU interface\n");
Regards,
--
Julien Grall
^ permalink raw reply [flat|nested] 3+ messages in thread
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2014-07-09 11:54 [PATCH 2/2] xen/arm: Fix PLATFORM_QUIRK_GIC_64K_STRIDE Ian Campbell
2014-07-09 11:56 ` Ian Campbell
2014-07-09 12:11 ` Julien Grall
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