From mboxrd@z Thu Jan  1 00:00:00 1970
From: Sylwester Nawrocki <s.nawrocki@samsung.com>
Subject: Re: [PATCH 8/9] Documentation: devicetree: Document sclk-jpeg clock
 for exynos3250 SoC
Date: Fri, 11 Jul 2014 15:54:08 +0200
Message-ID: <53BFEC80.2010307@samsung.com>
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To: Jacek Anaszewski <j.anaszewski@samsung.com>
Cc: linux-media@vger.kernel.org, kyungmin.park@samsung.com, b.zolnierkie@samsung.com, linux-samsung-soc@vger.kernel.org, Rob Herring <robh+dt@kernel.org>, Pawel Moll <pawel.moll@arm.com>, Mark Rutland <mark.rutland@arm.com>, Ian Campbell <ijc+devicetree@hellion.org.uk>, Kumar Gala <galak@codeaurora.org>, devicetree@vger.kernel.org
List-Id: linux-samsung-soc@vger.kernel.org

On 07/07/14 18:32, Jacek Anaszewski wrote:
> JPEG IP on Exynos3250 SoC requires enabling two clock
> gates for its operation. This patch documents this
> requirement.
> 
> Signed-off-by: Jacek Anaszewski <j.anaszewski@samsung.com>
> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
> Cc: Rob Herring <robh+dt@kernel.org>
> Cc: Pawel Moll <pawel.moll@arm.com>
> Cc: Mark Rutland <mark.rutland@arm.com>
> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
> Cc: Kumar Gala <galak@codeaurora.org>
> Cc: devicetree@vger.kernel.org
> ---
>  .../bindings/media/exynos-jpeg-codec.txt           |    9 ++++++---
>  1 file changed, 6 insertions(+), 3 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/media/exynos-jpeg-codec.txt b/Documentation/devicetree/bindings/media/exynos-jpeg-codec.txt
> index 937b755..20cd150 100644
> --- a/Documentation/devicetree/bindings/media/exynos-jpeg-codec.txt
> +++ b/Documentation/devicetree/bindings/media/exynos-jpeg-codec.txt
> @@ -3,9 +3,12 @@ Samsung S5P/EXYNOS SoC series JPEG codec
>  Required properties:
>  
>  - compatible	: should be one of:
> -		  "samsung,s5pv210-jpeg", "samsung,exynos4210-jpeg";
> +		  "samsung,s5pv210-jpeg", "samsung,exynos4210-jpeg",
> +		  "samsung,exynos3250-jpeg";
>  - reg		: address and length of the JPEG codec IP register set;
>  - interrupts	: specifies the JPEG codec IP interrupt;
>  - clocks	: should contain the JPEG codec IP gate clock specifier, from the
> -		  common clock bindings;
> -- clock-names	: should contain "jpeg" entry.
> +		  common clock bindings; for Exynos3250 SoC special clock gate
> +		  should be defined as the second element of the clocks array

Entries in the clocks and clock-names can be in any order, the only
requirement normally is that they match. I would rephrase this to
something along the lines of:

 - clocks : should contain the JPEG codec IP gate clock specifier and
            for the Exynos3250 SoC additionally the SCLK_JPEG entry; from the
	    common clock bindings;

> +- clock-names	: should contain "jpeg" entry and additionally "sclk-jpeg" entry
> +		  for Exynos3250 SoC

--
Thanks,
Sylwester