diff for duplicates of <53C01558.3090607@nvidia.com> diff --git a/a/1.txt b/N1/1.txt index 68a0a94..273402f 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,7 +1,7 @@ On 11/07/14 19:28, Andrew Bresticker wrote: -> On Thu, Jul 10, 2014 at 2:42 PM, Tuomas Tynkkynen <ttynkkynen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> wrote: +> On Thu, Jul 10, 2014 at 2:42 PM, Tuomas Tynkkynen <ttynkkynen@nvidia.com> wrote: >> The DFLL is the main clocksource for the fast CPU cluster on Tegra124 >> and also provides automatic CPU rail voltage scaling as well. The DFLL >> is a separate IP block from the usual Tegra124 clock-and-reset @@ -23,7 +23,3 @@ that the mapping is linear and doesn't have holes. -- nvpublic --- -To unsubscribe from this list: send the line "unsubscribe devicetree" in -the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org -More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/a/content_digest b/N1/content_digest index af23e57..041b458 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,29 +1,16 @@ "ref\01405028569-14253-1-git-send-email-ttynkkynen@nvidia.com\0" "ref\01405028569-14253-2-git-send-email-ttynkkynen@nvidia.com\0" "ref\0CAL1qeaFF0ZpUFovxTuLXrBPRg2Lbf-754Z=ztD5HFZPbfnDsAw@mail.gmail.com\0" - "ref\0CAL1qeaFF0ZpUFovxTuLXrBPRg2Lbf-754Z=ztD5HFZPbfnDsAw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org\0" - "From\0Tuomas Tynkkynen <ttynkkynen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\0" - "Subject\0Re: [PATCH 01/13] clk: tegra: Add binding for the Tegra124 DFLL clocksource\0" + "From\0ttynkkynen@nvidia.com (Tuomas Tynkkynen)\0" + "Subject\0[PATCH 01/13] clk: tegra: Add binding for the Tegra124 DFLL clocksource\0" "Date\0Fri, 11 Jul 2014 19:48:24 +0300\0" - "To\0Andrew Bresticker <abrestic-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>\0" - "Cc\0linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org <linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>" - linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org <linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org> - linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org <linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org> - linux-pm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org <linux-pm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org> - devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org <devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org> - Prashant Gaikwad <pgaikwad-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> - Mike Turquette <mturquette-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> - Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org> - Viresh Kumar <viresh.kumar-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> - Peter De Schrijver <pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> - Rafael J. Wysocki <rjw-LthD3rsA81gm4RdzfppkhA@public.gmane.org> - " Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "\n" "\n" "On 11/07/14 19:28, Andrew Bresticker wrote:\n" - "> On Thu, Jul 10, 2014 at 2:42 PM, Tuomas Tynkkynen <ttynkkynen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> wrote:\n" + "> On Thu, Jul 10, 2014 at 2:42 PM, Tuomas Tynkkynen <ttynkkynen@nvidia.com> wrote:\n" ">> The DFLL is the main clocksource for the fast CPU cluster on Tegra124\n" ">> and also provides automatic CPU rail voltage scaling as well. The DFLL\n" ">> is a separate IP block from the usual Tegra124 clock-and-reset\n" @@ -44,10 +31,6 @@ "that the mapping is linear and doesn't have holes.\n" "\n" "-- \n" - "nvpublic\n" - "--\n" - "To unsubscribe from this list: send the line \"unsubscribe devicetree\" in\n" - "the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\n" - More majordomo info at http://vger.kernel.org/majordomo-info.html + nvpublic -56e67f2a5d0dd0b45ddcaa0dcbf15fdaba62a2810be19d038469e8664f93b988 +64ae797615b48c4b0fc04d4fa81783a0a2a5969fa58c5ae6a84add808af9ccfe
diff --git a/a/1.txt b/N2/1.txt index 68a0a94..273402f 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -1,7 +1,7 @@ On 11/07/14 19:28, Andrew Bresticker wrote: -> On Thu, Jul 10, 2014 at 2:42 PM, Tuomas Tynkkynen <ttynkkynen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> wrote: +> On Thu, Jul 10, 2014 at 2:42 PM, Tuomas Tynkkynen <ttynkkynen@nvidia.com> wrote: >> The DFLL is the main clocksource for the fast CPU cluster on Tegra124 >> and also provides automatic CPU rail voltage scaling as well. The DFLL >> is a separate IP block from the usual Tegra124 clock-and-reset @@ -23,7 +23,3 @@ that the mapping is linear and doesn't have holes. -- nvpublic --- -To unsubscribe from this list: send the line "unsubscribe devicetree" in -the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org -More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/a/content_digest b/N2/content_digest index af23e57..4025e7a 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -1,29 +1,28 @@ "ref\01405028569-14253-1-git-send-email-ttynkkynen@nvidia.com\0" "ref\01405028569-14253-2-git-send-email-ttynkkynen@nvidia.com\0" "ref\0CAL1qeaFF0ZpUFovxTuLXrBPRg2Lbf-754Z=ztD5HFZPbfnDsAw@mail.gmail.com\0" - "ref\0CAL1qeaFF0ZpUFovxTuLXrBPRg2Lbf-754Z=ztD5HFZPbfnDsAw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org\0" - "From\0Tuomas Tynkkynen <ttynkkynen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\0" + "From\0Tuomas Tynkkynen <ttynkkynen@nvidia.com>\0" "Subject\0Re: [PATCH 01/13] clk: tegra: Add binding for the Tegra124 DFLL clocksource\0" "Date\0Fri, 11 Jul 2014 19:48:24 +0300\0" - "To\0Andrew Bresticker <abrestic-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>\0" - "Cc\0linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org <linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>" - linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org <linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org> - linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org <linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org> - linux-pm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org <linux-pm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org> - devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org <devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org> - Prashant Gaikwad <pgaikwad-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> - Mike Turquette <mturquette-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> - Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org> - Viresh Kumar <viresh.kumar-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> - Peter De Schrijver <pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> - Rafael J. Wysocki <rjw-LthD3rsA81gm4RdzfppkhA@public.gmane.org> - " Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>\0" + "To\0Andrew Bresticker <abrestic@chromium.org>\0" + "Cc\0linux-tegra@vger.kernel.org <linux-tegra@vger.kernel.org>" + linux-kernel@vger.kernel.org <linux-kernel@vger.kernel.org> + linux-arm-kernel@lists.infradead.org <linux-arm-kernel@lists.infradead.org> + linux-pm@vger.kernel.org <linux-pm@vger.kernel.org> + devicetree@vger.kernel.org <devicetree@vger.kernel.org> + Prashant Gaikwad <pgaikwad@nvidia.com> + Mike Turquette <mturquette@linaro.org> + Stephen Warren <swarren@wwwdotorg.org> + Viresh Kumar <viresh.kumar@linaro.org> + Peter De Schrijver <pdeschrijver@nvidia.com> + Rafael J. Wysocki <rjw@rjwysocki.net> + " Thierry Reding <thierry.reding@gmail.com>\0" "\00:1\0" "b\0" "\n" "\n" "On 11/07/14 19:28, Andrew Bresticker wrote:\n" - "> On Thu, Jul 10, 2014 at 2:42 PM, Tuomas Tynkkynen <ttynkkynen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> wrote:\n" + "> On Thu, Jul 10, 2014 at 2:42 PM, Tuomas Tynkkynen <ttynkkynen@nvidia.com> wrote:\n" ">> The DFLL is the main clocksource for the fast CPU cluster on Tegra124\n" ">> and also provides automatic CPU rail voltage scaling as well. The DFLL\n" ">> is a separate IP block from the usual Tegra124 clock-and-reset\n" @@ -44,10 +43,6 @@ "that the mapping is linear and doesn't have holes.\n" "\n" "-- \n" - "nvpublic\n" - "--\n" - "To unsubscribe from this list: send the line \"unsubscribe devicetree\" in\n" - "the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\n" - More majordomo info at http://vger.kernel.org/majordomo-info.html + nvpublic -56e67f2a5d0dd0b45ddcaa0dcbf15fdaba62a2810be19d038469e8664f93b988 +b39f7714d11a6f3d35b6220e7a7646ae430aad8f0fd8a5da6c93ebe3ccdf0077
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