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From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
To: Markos Chandras <markos.chandras@imgtec.com>, linux-mips@linux-mips.org
Cc: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Subject: Re: [PATCH 1/3] MIPS: Add new option for unique RI/XI exceptions
Date: Tue, 15 Jul 2014 20:09:34 +0400	[thread overview]
Message-ID: <53C5523E.7060503@cogentembedded.com> (raw)
In-Reply-To: <1405429797-18281-2-git-send-email-markos.chandras@imgtec.com>

Hello.

On 07/15/2014 05:09 PM, Markos Chandras wrote:

> From: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>

> MIPSr5 added support for unique exception codes for the Read-Inhibit
> and Execute-Inhibit exceptions.

> Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
> Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
[...]

> diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h
> index 8219c0a5f77e..be13f2879c84 100644
> --- a/arch/mips/include/asm/cpu.h
> +++ b/arch/mips/include/asm/cpu.h
> @@ -364,6 +364,7 @@ enum cpu_type_enum {
>   #define MIPS_CPU_SEGMENTS	0x04000000ull /* CPU supports Segmentation Control registers */
>   #define MIPS_CPU_EVA		0x80000000ull /* CPU supports Enhanced Virtual Addressing */
>   #define MIPS_CPU_HTW		0x100000000ull /* CPU support Hardware Page Table Walker */
> +#define MIPS_CPU_RIXIEX		0x200000000ull /* CPU has unique exception codes for {Read, Execute}-Inhibit exceptions */

    I think this conflicts with the MAAR patchset.

WBR, Sergei

  reply	other threads:[~2014-07-15 16:09 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-07-15 13:09 [PATCH 0/3] Use dedicated RI/XI exceptions for MIPSR5 cores Markos Chandras
2014-07-15 13:09 ` Markos Chandras
2014-07-15 13:09 ` [PATCH 1/3] MIPS: Add new option for unique RI/XI exceptions Markos Chandras
2014-07-15 13:09   ` Markos Chandras
2014-07-15 16:09   ` Sergei Shtylyov [this message]
2014-07-16  7:45     ` Markos Chandras
2014-07-16  7:45       ` Markos Chandras
2014-07-15 13:09 ` [PATCH 2/3] MIPS: Use dedicated exception handler if CPU supports " Markos Chandras
2014-07-15 13:09   ` Markos Chandras
2014-07-15 13:09 ` [PATCH 3/3] MIPS: kernel: cpu-probe: Detect unique " Markos Chandras
2014-07-15 13:09   ` Markos Chandras
2014-07-15 18:50 ` [PATCH 0/3] Use dedicated RI/XI exceptions for MIPSR5 cores David Daney
2014-07-16  7:44   ` Markos Chandras
2014-07-16  7:44     ` Markos Chandras

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