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diff for duplicates of <53CD860B.7030800@wwwdotorg.org>

diff --git a/a/1.txt b/N1/1.txt
index 2805051..8dae7d3 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -1,5 +1,5 @@
 On 07/11/2014 10:43 AM, Andrew Bresticker wrote:
-> On Fri, Jul 11, 2014 at 7:18 AM, Mikko Perttunen <mperttunen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> wrote:
+> On Fri, Jul 11, 2014 at 7:18 AM, Mikko Perttunen <mperttunen@nvidia.com> wrote:
 >> Add binding documentation for the nvidia,tegra124-emc device tree
 >> node.
 > 
@@ -14,7 +14,7 @@ On 07/11/2014 10:43 AM, Andrew Bresticker wrote:
 >> +    is first read from the MC node. If it doesn't exist, it is read
 >> +    from this property.
 >> +- timings : Should contain 1 entry for each supported clock rate.
->> +  Entries should be named "timing@n" where n is a 0-based increasing
+>> +  Entries should be named "timing at n" where n is a 0-based increasing
 >> +  number. The timings must be listed in rate-ascending order.
 > 
 > There are upcoming boards which support multiple DRAM configurations
@@ -24,9 +24,9 @@ On 07/11/2014 10:43 AM, Andrew Bresticker wrote:
 > Something like:
 > 
 > emc {
->         emc-table@0 {
+>         emc-table at 0 {
 >                 nvidia,ram-code = <0>;
->                 timing@0 {
+>                 timing at 0 {
 >                         ...
 >                 };
 >                 ...
diff --git a/a/content_digest b/N1/content_digest
index d129d47..bd53d3e 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,23 +1,14 @@
  "ref\01405088313-20048-1-git-send-email-mperttunen@nvidia.com\0"
  "ref\01405088313-20048-6-git-send-email-mperttunen@nvidia.com\0"
  "ref\0CAL1qeaGHfjQhLHvgzt85hmbuY4FOG5-k=f80=CNvzPDEgi9_6w@mail.gmail.com\0"
- "ref\0CAL1qeaGHfjQhLHvgzt85hmbuY4FOG5-k=f80=CNvzPDEgi9_6w-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org\0"
- "From\0Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>\0"
- "Subject\0Re: [PATCH 5/8] of: Add Tegra124 EMC bindings\0"
+ "From\0swarren@wwwdotorg.org (Stephen Warren)\0"
+ "Subject\0[PATCH 5/8] of: Add Tegra124 EMC bindings\0"
  "Date\0Mon, 21 Jul 2014 15:28:43 -0600\0"
- "To\0Andrew Bresticker <abrestic-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>"
- " Mikko Perttunen <mperttunen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\0"
- "Cc\0Peter De Schrijver <pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>"
-  Prashant Gaikwad <pgaikwad-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
-  Mike Turquette <mturquette-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
-  Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
-  linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org <linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>
-  linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org <linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>
- " linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org <linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>\0"
+ "To\0linux-arm-kernel@lists.infradead.org\0"
  "\00:1\0"
  "b\0"
  "On 07/11/2014 10:43 AM, Andrew Bresticker wrote:\n"
- "> On Fri, Jul 11, 2014 at 7:18 AM, Mikko Perttunen <mperttunen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> wrote:\n"
+ "> On Fri, Jul 11, 2014 at 7:18 AM, Mikko Perttunen <mperttunen@nvidia.com> wrote:\n"
  ">> Add binding documentation for the nvidia,tegra124-emc device tree\n"
  ">> node.\n"
  "> \n"
@@ -32,7 +23,7 @@
  ">> +    is first read from the MC node. If it doesn't exist, it is read\n"
  ">> +    from this property.\n"
  ">> +- timings : Should contain 1 entry for each supported clock rate.\n"
- ">> +  Entries should be named \"timing@n\" where n is a 0-based increasing\n"
+ ">> +  Entries should be named \"timing at n\" where n is a 0-based increasing\n"
  ">> +  number. The timings must be listed in rate-ascending order.\n"
  "> \n"
  "> There are upcoming boards which support multiple DRAM configurations\n"
@@ -42,9 +33,9 @@
  "> Something like:\n"
  "> \n"
  "> emc {\n"
- ">         emc-table@0 {\n"
+ ">         emc-table at 0 {\n"
  ">                 nvidia,ram-code = <0>;\n"
- ">                 timing@0 {\n"
+ ">                 timing at 0 {\n"
  ">                         ...\n"
  ">                 };\n"
  ">                 ...\n"
@@ -64,4 +55,4 @@
  "do this automatically, and whether we have any way to get that value\n"
  into the kernel, so it could use it for the extra DT level lookup?
 
-b4d2c08d3fe6d1306c58e18e617c5c315456d1ac1039504ea48586b8fa0b0e4e
+4f5576e1ad5650e104eda09229e84cf8649343b3dc68a82895825ed2f0c38874

diff --git a/a/1.txt b/N2/1.txt
index 2805051..c0f69af 100644
--- a/a/1.txt
+++ b/N2/1.txt
@@ -1,5 +1,5 @@
 On 07/11/2014 10:43 AM, Andrew Bresticker wrote:
-> On Fri, Jul 11, 2014 at 7:18 AM, Mikko Perttunen <mperttunen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> wrote:
+> On Fri, Jul 11, 2014 at 7:18 AM, Mikko Perttunen <mperttunen@nvidia.com> wrote:
 >> Add binding documentation for the nvidia,tegra124-emc device tree
 >> node.
 > 
diff --git a/a/content_digest b/N2/content_digest
index d129d47..2350c5d 100644
--- a/a/content_digest
+++ b/N2/content_digest
@@ -1,23 +1,22 @@
  "ref\01405088313-20048-1-git-send-email-mperttunen@nvidia.com\0"
  "ref\01405088313-20048-6-git-send-email-mperttunen@nvidia.com\0"
  "ref\0CAL1qeaGHfjQhLHvgzt85hmbuY4FOG5-k=f80=CNvzPDEgi9_6w@mail.gmail.com\0"
- "ref\0CAL1qeaGHfjQhLHvgzt85hmbuY4FOG5-k=f80=CNvzPDEgi9_6w-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org\0"
- "From\0Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>\0"
+ "From\0Stephen Warren <swarren@wwwdotorg.org>\0"
  "Subject\0Re: [PATCH 5/8] of: Add Tegra124 EMC bindings\0"
  "Date\0Mon, 21 Jul 2014 15:28:43 -0600\0"
- "To\0Andrew Bresticker <abrestic-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>"
- " Mikko Perttunen <mperttunen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\0"
- "Cc\0Peter De Schrijver <pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>"
-  Prashant Gaikwad <pgaikwad-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
-  Mike Turquette <mturquette-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
-  Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
-  linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org <linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>
-  linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org <linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>
- " linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org <linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>\0"
+ "To\0Andrew Bresticker <abrestic@chromium.org>"
+ " Mikko Perttunen <mperttunen@nvidia.com>\0"
+ "Cc\0Peter De Schrijver <pdeschrijver@nvidia.com>"
+  Prashant Gaikwad <pgaikwad@nvidia.com>
+  Mike Turquette <mturquette@linaro.org>
+  Thierry Reding <thierry.reding@gmail.com>
+  linux-kernel@vger.kernel.org <linux-kernel@vger.kernel.org>
+  linux-arm-kernel@lists.infradead.org <linux-arm-kernel@lists.infradead.org>
+ " linux-tegra@vger.kernel.org <linux-tegra@vger.kernel.org>\0"
  "\00:1\0"
  "b\0"
  "On 07/11/2014 10:43 AM, Andrew Bresticker wrote:\n"
- "> On Fri, Jul 11, 2014 at 7:18 AM, Mikko Perttunen <mperttunen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> wrote:\n"
+ "> On Fri, Jul 11, 2014 at 7:18 AM, Mikko Perttunen <mperttunen@nvidia.com> wrote:\n"
  ">> Add binding documentation for the nvidia,tegra124-emc device tree\n"
  ">> node.\n"
  "> \n"
@@ -64,4 +63,4 @@
  "do this automatically, and whether we have any way to get that value\n"
  into the kernel, so it could use it for the extra DT level lookup?
 
-b4d2c08d3fe6d1306c58e18e617c5c315456d1ac1039504ea48586b8fa0b0e4e
+6e11ba22bf7e6e6a98f84b7199cc5b94b1a22e243b1d64a04a68a2829b0f36a2

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