diff for duplicates of <53CE8EEC.2090402@intel.com> diff --git a/a/1.txt b/N1/1.txt index ab56d68..29bf343 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -10,12 +10,12 @@ Is this enough checking? Looking at the extension reference, it says: > 9.3.3 > Enabling of Intel MPX States > An OS can enable Intel MPX states to support software operation using bounds registers with the following steps: -> ? Verify the processor supports XSAVE/XRSTOR/XSETBV/XGETBV instructions and XCR0 by checking +> • Verify the processor supports XSAVE/XRSTOR/XSETBV/XGETBV instructions and XCR0 by checking > CPUID.1.ECX.XSAVE[bit 26]=1. That, I assume the xsave code is already doing. -> ? Verify the processor supports both Intel MPX states by checking CPUID.(EAX=0x0D, ECX=0):EAX[4:3] is 11b. +> • Verify the processor supports both Intel MPX states by checking CPUID.(EAX=0x0D, ECX=0):EAX[4:3] is 11b. I see these bits _attempting_ to get set in pcntxt_mask via XCNTXT_MASK. But, I don't see us ever actually checking that they _do_ get set. For @@ -26,9 +26,3 @@ instance, we do this for: > pcntxt_mask); > BUG(); > } - --- -To unsubscribe, send a message with 'unsubscribe linux-mm' in -the body to majordomo@kvack.org. For more info on Linux MM, -see: http://www.linux-mm.org/ . -Don't email: <a href=mailto:"dont@kvack.org"> email@kvack.org </a> diff --git a/a/content_digest b/N1/content_digest index 2ec8972..6f1ebaf 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -24,12 +24,12 @@ "> 9.3.3\n" "> Enabling of Intel MPX States\n" "> An OS can enable Intel MPX states to support software operation using bounds registers with the following steps:\n" - "> ? Verify the processor supports XSAVE/XRSTOR/XSETBV/XGETBV instructions and XCR0 by checking\n" + "> \342\200\242 Verify the processor supports XSAVE/XRSTOR/XSETBV/XGETBV instructions and XCR0 by checking\n" "> CPUID.1.ECX.XSAVE[bit 26]=1.\n" "\n" "That, I assume the xsave code is already doing.\n" "\n" - "> ? Verify the processor supports both Intel MPX states by checking CPUID.(EAX=0x0D, ECX=0):EAX[4:3] is 11b.\n" + "> \342\200\242 Verify the processor supports both Intel MPX states by checking CPUID.(EAX=0x0D, ECX=0):EAX[4:3] is 11b.\n" "\n" "I see these bits _attempting_ to get set in pcntxt_mask via XCNTXT_MASK.\n" " But, I don't see us ever actually checking that they _do_ get set. For\n" @@ -39,12 +39,6 @@ "> pr_err(\"FP/SSE not shown under xsave features 0x%llx\\n\",\n" "> pcntxt_mask);\n" "> BUG();\n" - "> }\n" - "\n" - "--\n" - "To unsubscribe, send a message with 'unsubscribe linux-mm' in\n" - "the body to majordomo@kvack.org. For more info on Linux MM,\n" - "see: http://www.linux-mm.org/ .\n" - "Don't email: <a href=mailto:\"dont@kvack.org\"> email@kvack.org </a>" + > } -54c88418602a5717fa7e218dec58ae262558e5fa5a52db12a9659e7e68cefdce +ac4d0d3686e54f19126bbaa0660339cd11b17ecb83f868a27c1cac5add72dfab
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