diff for duplicates of <53CE9514.1050903@wwwdotorg.org> diff --git a/a/1.txt b/N1/1.txt index 049aa39..ab5c692 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,7 +1,7 @@ On 07/21/2014 04:52 PM, Andrew Bresticker wrote: -> On Mon, Jul 21, 2014 at 2:28 PM, Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org> wrote: +> On Mon, Jul 21, 2014 at 2:28 PM, Stephen Warren <swarren@wwwdotorg.org> wrote: >> On 07/11/2014 10:43 AM, Andrew Bresticker wrote: ->>> On Fri, Jul 11, 2014 at 7:18 AM, Mikko Perttunen <mperttunen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> wrote: +>>> On Fri, Jul 11, 2014 at 7:18 AM, Mikko Perttunen <mperttunen@nvidia.com> wrote: >>>> Add binding documentation for the nvidia,tegra124-emc device tree >>>> node. >>> @@ -16,7 +16,7 @@ On 07/21/2014 04:52 PM, Andrew Bresticker wrote: >>>> + is first read from the MC node. If it doesn't exist, it is read >>>> + from this property. >>>> +- timings : Should contain 1 entry for each supported clock rate. ->>>> + Entries should be named "timing@n" where n is a 0-based increasing +>>>> + Entries should be named "timing at n" where n is a 0-based increasing >>>> + number. The timings must be listed in rate-ascending order. >>> >>> There are upcoming boards which support multiple DRAM configurations @@ -26,9 +26,9 @@ On 07/21/2014 04:52 PM, Andrew Bresticker wrote: >>> Something like: >>> >>> emc { ->>> emc-table@0 { +>>> emc-table at 0 { >>> nvidia,ram-code = <0>; ->>> timing@0 { +>>> timing at 0 { >>> ... >>> }; >>> ... diff --git a/a/content_digest b/N1/content_digest index a04be54..b3dcf8a 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -3,25 +3,16 @@ "ref\0CAL1qeaGHfjQhLHvgzt85hmbuY4FOG5-k=f80=CNvzPDEgi9_6w@mail.gmail.com\0" "ref\053CD860B.7030800@wwwdotorg.org\0" "ref\0CAL1qeaHtGQxCO3cGdeCRUYuk6mxei6z1B63-iZdBECEbFqGhHw@mail.gmail.com\0" - "ref\0CAL1qeaHtGQxCO3cGdeCRUYuk6mxei6z1B63-iZdBECEbFqGhHw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org\0" - "From\0Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>\0" - "Subject\0Re: [PATCH 5/8] of: Add Tegra124 EMC bindings\0" + "From\0swarren@wwwdotorg.org (Stephen Warren)\0" + "Subject\0[PATCH 5/8] of: Add Tegra124 EMC bindings\0" "Date\0Tue, 22 Jul 2014 10:45:08 -0600\0" - "To\0Andrew Bresticker <abrestic-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>\0" - "Cc\0Mikko Perttunen <mperttunen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>" - Peter De Schrijver <pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> - Prashant Gaikwad <pgaikwad-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> - Mike Turquette <mturquette-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> - Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> - linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org <linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org> - linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org <linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org> - " linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org <linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "On 07/21/2014 04:52 PM, Andrew Bresticker wrote:\n" - "> On Mon, Jul 21, 2014 at 2:28 PM, Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org> wrote:\n" + "> On Mon, Jul 21, 2014 at 2:28 PM, Stephen Warren <swarren@wwwdotorg.org> wrote:\n" ">> On 07/11/2014 10:43 AM, Andrew Bresticker wrote:\n" - ">>> On Fri, Jul 11, 2014 at 7:18 AM, Mikko Perttunen <mperttunen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> wrote:\n" + ">>> On Fri, Jul 11, 2014 at 7:18 AM, Mikko Perttunen <mperttunen@nvidia.com> wrote:\n" ">>>> Add binding documentation for the nvidia,tegra124-emc device tree\n" ">>>> node.\n" ">>>\n" @@ -36,7 +27,7 @@ ">>>> + is first read from the MC node. If it doesn't exist, it is read\n" ">>>> + from this property.\n" ">>>> +- timings : Should contain 1 entry for each supported clock rate.\n" - ">>>> + Entries should be named \"timing@n\" where n is a 0-based increasing\n" + ">>>> + Entries should be named \"timing at n\" where n is a 0-based increasing\n" ">>>> + number. The timings must be listed in rate-ascending order.\n" ">>>\n" ">>> There are upcoming boards which support multiple DRAM configurations\n" @@ -46,9 +37,9 @@ ">>> Something like:\n" ">>>\n" ">>> emc {\n" - ">>> emc-table@0 {\n" + ">>> emc-table at 0 {\n" ">>> nvidia,ram-code = <0>;\n" - ">>> timing@0 {\n" + ">>> timing at 0 {\n" ">>> ...\n" ">>> };\n" ">>> ...\n" @@ -99,4 +90,4 @@ "(isn't STRAPPING_OPT_A split into 2 2-bit fields; 2 bits for SDRAM index\n" and 2 bits for boot flash index, so max N is quite small?) -2b5f24b9680e854b738da44962f84d814e05e70bb8a2ad45868d00ba17969273 +0bc29d303c1cbc5401d6144946235ce8353148f50018c6a06214e8fe10a27300
diff --git a/a/1.txt b/N2/1.txt index 049aa39..afc12c8 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -1,7 +1,7 @@ On 07/21/2014 04:52 PM, Andrew Bresticker wrote: -> On Mon, Jul 21, 2014 at 2:28 PM, Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org> wrote: +> On Mon, Jul 21, 2014 at 2:28 PM, Stephen Warren <swarren@wwwdotorg.org> wrote: >> On 07/11/2014 10:43 AM, Andrew Bresticker wrote: ->>> On Fri, Jul 11, 2014 at 7:18 AM, Mikko Perttunen <mperttunen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> wrote: +>>> On Fri, Jul 11, 2014 at 7:18 AM, Mikko Perttunen <mperttunen@nvidia.com> wrote: >>>> Add binding documentation for the nvidia,tegra124-emc device tree >>>> node. >>> diff --git a/a/content_digest b/N2/content_digest index a04be54..3ad5391 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -3,25 +3,24 @@ "ref\0CAL1qeaGHfjQhLHvgzt85hmbuY4FOG5-k=f80=CNvzPDEgi9_6w@mail.gmail.com\0" "ref\053CD860B.7030800@wwwdotorg.org\0" "ref\0CAL1qeaHtGQxCO3cGdeCRUYuk6mxei6z1B63-iZdBECEbFqGhHw@mail.gmail.com\0" - "ref\0CAL1qeaHtGQxCO3cGdeCRUYuk6mxei6z1B63-iZdBECEbFqGhHw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org\0" - "From\0Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>\0" + "From\0Stephen Warren <swarren@wwwdotorg.org>\0" "Subject\0Re: [PATCH 5/8] of: Add Tegra124 EMC bindings\0" "Date\0Tue, 22 Jul 2014 10:45:08 -0600\0" - "To\0Andrew Bresticker <abrestic-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>\0" - "Cc\0Mikko Perttunen <mperttunen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>" - Peter De Schrijver <pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> - Prashant Gaikwad <pgaikwad-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> - Mike Turquette <mturquette-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> - Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> - linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org <linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org> - linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org <linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org> - " linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org <linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>\0" + "To\0Andrew Bresticker <abrestic@chromium.org>\0" + "Cc\0Mikko Perttunen <mperttunen@nvidia.com>" + Peter De Schrijver <pdeschrijver@nvidia.com> + Prashant Gaikwad <pgaikwad@nvidia.com> + Mike Turquette <mturquette@linaro.org> + Thierry Reding <thierry.reding@gmail.com> + linux-kernel@vger.kernel.org <linux-kernel@vger.kernel.org> + linux-arm-kernel@lists.infradead.org <linux-arm-kernel@lists.infradead.org> + " linux-tegra@vger.kernel.org <linux-tegra@vger.kernel.org>\0" "\00:1\0" "b\0" "On 07/21/2014 04:52 PM, Andrew Bresticker wrote:\n" - "> On Mon, Jul 21, 2014 at 2:28 PM, Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org> wrote:\n" + "> On Mon, Jul 21, 2014 at 2:28 PM, Stephen Warren <swarren@wwwdotorg.org> wrote:\n" ">> On 07/11/2014 10:43 AM, Andrew Bresticker wrote:\n" - ">>> On Fri, Jul 11, 2014 at 7:18 AM, Mikko Perttunen <mperttunen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> wrote:\n" + ">>> On Fri, Jul 11, 2014 at 7:18 AM, Mikko Perttunen <mperttunen@nvidia.com> wrote:\n" ">>>> Add binding documentation for the nvidia,tegra124-emc device tree\n" ">>>> node.\n" ">>>\n" @@ -99,4 +98,4 @@ "(isn't STRAPPING_OPT_A split into 2 2-bit fields; 2 bits for SDRAM index\n" and 2 bits for boot flash index, so max N is quite small?) -2b5f24b9680e854b738da44962f84d814e05e70bb8a2ad45868d00ba17969273 +5bc46dba6652f6bc960bbd278b655c0886f54f611004a4b671b58d2b459f2008
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