diff for duplicates of <53CFDA35.1080203@linaro.org> diff --git a/a/1.txt b/N1/1.txt index 0577cc7..3695198 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -405,7 +405,7 @@ Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> > + #size-cells = <0>; > + #address-cells = <2>; > + -> + CPU0: cpu@0 { +> + CPU0: cpu at 0 { > + device_type = "cpu"; > + compatible = "arm,cortex-a57"; > + reg = <0x0 0x0>; @@ -414,7 +414,7 @@ Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> > + &CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>; > + }; > + -> + CPU1: cpu@1 { +> + CPU1: cpu at 1 { > + device_type = "cpu"; > + compatible = "arm,cortex-a57"; > + reg = <0x0 0x1>; @@ -423,7 +423,7 @@ Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> > + &CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>; > + }; > + -> + CPU2: cpu@100 { +> + CPU2: cpu at 100 { > + device_type = "cpu"; > + compatible = "arm,cortex-a57"; > + reg = <0x0 0x100>; @@ -432,7 +432,7 @@ Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> > + &CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>; > + }; > + -> + CPU3: cpu@101 { +> + CPU3: cpu at 101 { > + device_type = "cpu"; > + compatible = "arm,cortex-a57"; > + reg = <0x0 0x101>; @@ -441,7 +441,7 @@ Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> > + &CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>; > + }; > + -> + CPU4: cpu@10000 { +> + CPU4: cpu at 10000 { > + device_type = "cpu"; > + compatible = "arm,cortex-a57"; > + reg = <0x0 0x10000>; @@ -450,7 +450,7 @@ Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> > + &CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>; > + }; > + -> + CPU5: cpu@10001 { +> + CPU5: cpu at 10001 { > + device_type = "cpu"; > + compatible = "arm,cortex-a57"; > + reg = <0x0 0x10001>; @@ -459,7 +459,7 @@ Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> > + &CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>; > + }; > + -> + CPU6: cpu@10100 { +> + CPU6: cpu at 10100 { > + device_type = "cpu"; > + compatible = "arm,cortex-a57"; > + reg = <0x0 0x10100>; @@ -468,7 +468,7 @@ Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> > + &CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>; > + }; > + -> + CPU7: cpu@10101 { +> + CPU7: cpu at 10101 { > + device_type = "cpu"; > + compatible = "arm,cortex-a57"; > + reg = <0x0 0x10101>; @@ -477,7 +477,7 @@ Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> > + &CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>; > + }; > + -> + CPU8: cpu@100000000 { +> + CPU8: cpu at 100000000 { > + device_type = "cpu"; > + compatible = "arm,cortex-a53"; > + reg = <0x1 0x0>; @@ -486,7 +486,7 @@ Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> > + &CLUSTER_RETENTION_1 &CLUSTER_SLEEP_1>; > + }; > + -> + CPU9: cpu@100000001 { +> + CPU9: cpu at 100000001 { > + device_type = "cpu"; > + compatible = "arm,cortex-a53"; > + reg = <0x1 0x1>; @@ -495,7 +495,7 @@ Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> > + &CLUSTER_RETENTION_1 &CLUSTER_SLEEP_1>; > + }; > + -> + CPU10: cpu@100000100 { +> + CPU10: cpu at 100000100 { > + device_type = "cpu"; > + compatible = "arm,cortex-a53"; > + reg = <0x1 0x100>; @@ -504,7 +504,7 @@ Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> > + &CLUSTER_RETENTION_1 &CLUSTER_SLEEP_1>; > + }; > + -> + CPU11: cpu@100000101 { +> + CPU11: cpu at 100000101 { > + device_type = "cpu"; > + compatible = "arm,cortex-a53"; > + reg = <0x1 0x101>; @@ -513,7 +513,7 @@ Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> > + &CLUSTER_RETENTION_1 &CLUSTER_SLEEP_1>; > + }; > + -> + CPU12: cpu@100010000 { +> + CPU12: cpu at 100010000 { > + device_type = "cpu"; > + compatible = "arm,cortex-a53"; > + reg = <0x1 0x10000>; @@ -522,7 +522,7 @@ Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> > + &CLUSTER_RETENTION_1 &CLUSTER_SLEEP_1>; > + }; > + -> + CPU13: cpu@100010001 { +> + CPU13: cpu at 100010001 { > + device_type = "cpu"; > + compatible = "arm,cortex-a53"; > + reg = <0x1 0x10001>; @@ -531,7 +531,7 @@ Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> > + &CLUSTER_RETENTION_1 &CLUSTER_SLEEP_1>; > + }; > + -> + CPU14: cpu@100010100 { +> + CPU14: cpu at 100010100 { > + device_type = "cpu"; > + compatible = "arm,cortex-a53"; > + reg = <0x1 0x10100>; @@ -540,7 +540,7 @@ Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> > + &CLUSTER_RETENTION_1 &CLUSTER_SLEEP_1>; > + }; > + -> + CPU15: cpu@100010101 { +> + CPU15: cpu at 100010101 { > + device_type = "cpu"; > + compatible = "arm,cortex-a53"; > + reg = <0x1 0x10101>; @@ -636,56 +636,56 @@ Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> > + #size-cells = <0>; > + #address-cells = <1>; > + -> + CPU0: cpu@0 { +> + CPU0: cpu at 0 { > + device_type = "cpu"; > + compatible = "arm,cortex-a15"; > + reg = <0x0>; > + cpu-idle-states = <&CPU_SLEEP_0_0 &CLUSTER_SLEEP_0>; > + }; > + -> + CPU1: cpu@1 { +> + CPU1: cpu at 1 { > + device_type = "cpu"; > + compatible = "arm,cortex-a15"; > + reg = <0x1>; > + cpu-idle-states = <&CPU_SLEEP_0_0 &CLUSTER_SLEEP_0>; > + }; > + -> + CPU2: cpu@2 { +> + CPU2: cpu at 2 { > + device_type = "cpu"; > + compatible = "arm,cortex-a15"; > + reg = <0x2>; > + cpu-idle-states = <&CPU_SLEEP_0_0 &CLUSTER_SLEEP_0>; > + }; > + -> + CPU3: cpu@3 { +> + CPU3: cpu at 3 { > + device_type = "cpu"; > + compatible = "arm,cortex-a15"; > + reg = <0x3>; > + cpu-idle-states = <&CPU_SLEEP_0_0 &CLUSTER_SLEEP_0>; > + }; > + -> + CPU4: cpu@100 { +> + CPU4: cpu at 100 { > + device_type = "cpu"; > + compatible = "arm,cortex-a7"; > + reg = <0x100>; > + cpu-idle-states = <&CPU_SLEEP_1_0 &CLUSTER_SLEEP_1>; > + }; > + -> + CPU5: cpu@101 { +> + CPU5: cpu at 101 { > + device_type = "cpu"; > + compatible = "arm,cortex-a7"; > + reg = <0x101>; > + cpu-idle-states = <&CPU_SLEEP_1_0 &CLUSTER_SLEEP_1>; > + }; > + -> + CPU6: cpu@102 { +> + CPU6: cpu at 102 { > + device_type = "cpu"; > + compatible = "arm,cortex-a7"; > + reg = <0x102>; > + cpu-idle-states = <&CPU_SLEEP_1_0 &CLUSTER_SLEEP_1>; > + }; > + -> + CPU7: cpu@103 { +> + CPU7: cpu at 103 { > + device_type = "cpu"; > + compatible = "arm,cortex-a7"; > + reg = <0x103>; @@ -790,7 +790,7 @@ Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> -- - <http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs + <http://www.linaro.org/> Linaro.org ? Open source software for ARM SoCs Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook | <http://twitter.com/#!/linaroorg> Twitter | diff --git a/a/content_digest b/N1/content_digest index 4186b63..340ddd2 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,33 +1,9 @@ "ref\01405958786-17243-1-git-send-email-lorenzo.pieralisi@arm.com\0" "ref\01405958786-17243-2-git-send-email-lorenzo.pieralisi@arm.com\0" - "From\0Daniel Lezcano <daniel.lezcano@linaro.org>\0" - "Subject\0Re: [PATCH v6 1/7] Documentation: arm: define DT idle states bindings\0" + "From\0daniel.lezcano@linaro.org (Daniel Lezcano)\0" + "Subject\0[PATCH v6 1/7] Documentation: arm: define DT idle states bindings\0" "Date\0Wed, 23 Jul 2014 17:52:21 +0200\0" - "To\0Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>" - linux-arm-kernel@lists.infradead.org - " linux-pm@vger.kernel.org\0" - "Cc\0devicetree@vger.kernel.org" - Mark Rutland <mark.rutland@arm.com> - Sudeep Holla <sudeep.holla@arm.com> - Catalin Marinas <catalin.marinas@arm.com> - Charles Garcia Tobin <Charles.Garcia-Tobin@arm.com> - Nicolas Pitre <nico@linaro.org> - Rob Herring <robh+dt@kernel.org> - Grant Likely <grant.likely@linaro.org> - Peter De Schrijver <pdeschrijver@nvidia.com> - Santosh Shilimkar <santosh.shilimkar@ti.com> - Amit Kucheria <amit.kucheria@linaro.org> - Vincent Guittot <vincent.guittot@linaro.org> - Antti Miettinen <ananaza@iki.fi> - Stephen Boyd <sboyd@codeaurora.org> - Kevin Hilman <khilman@linaro.org> - Sebastian Capella <sebcape@gmail.com> - Tomasz Figa <t.figa@samsung.com> - Mark Brown <broonie@kernel.org> - Paul Walmsley <paul@pwsan.com> - Chander Kashyap <chander.kashyap@linaro.org> - Geoff Levand <geoff@infradead.org> - " Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "On 07/21/2014 06:06 PM, Lorenzo Pieralisi wrote:\n" @@ -437,7 +413,7 @@ "> +\t#size-cells = <0>;\n" "> +\t#address-cells = <2>;\n" "> +\n" - "> +\tCPU0: cpu@0 {\n" + "> +\tCPU0: cpu at 0 {\n" "> +\t\tdevice_type = \"cpu\";\n" "> +\t\tcompatible = \"arm,cortex-a57\";\n" "> +\t\treg = <0x0 0x0>;\n" @@ -446,7 +422,7 @@ "> +\t\t\t\t &CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>;\n" "> +\t};\n" "> +\n" - "> +\tCPU1: cpu@1 {\n" + "> +\tCPU1: cpu at 1 {\n" "> +\t\tdevice_type = \"cpu\";\n" "> +\t\tcompatible = \"arm,cortex-a57\";\n" "> +\t\treg = <0x0 0x1>;\n" @@ -455,7 +431,7 @@ "> +\t\t\t\t &CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>;\n" "> +\t};\n" "> +\n" - "> +\tCPU2: cpu@100 {\n" + "> +\tCPU2: cpu at 100 {\n" "> +\t\tdevice_type = \"cpu\";\n" "> +\t\tcompatible = \"arm,cortex-a57\";\n" "> +\t\treg = <0x0 0x100>;\n" @@ -464,7 +440,7 @@ "> +\t\t\t\t &CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>;\n" "> +\t};\n" "> +\n" - "> +\tCPU3: cpu@101 {\n" + "> +\tCPU3: cpu at 101 {\n" "> +\t\tdevice_type = \"cpu\";\n" "> +\t\tcompatible = \"arm,cortex-a57\";\n" "> +\t\treg = <0x0 0x101>;\n" @@ -473,7 +449,7 @@ "> +\t\t\t\t &CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>;\n" "> +\t};\n" "> +\n" - "> +\tCPU4: cpu@10000 {\n" + "> +\tCPU4: cpu at 10000 {\n" "> +\t\tdevice_type = \"cpu\";\n" "> +\t\tcompatible = \"arm,cortex-a57\";\n" "> +\t\treg = <0x0 0x10000>;\n" @@ -482,7 +458,7 @@ "> +\t\t\t\t &CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>;\n" "> +\t};\n" "> +\n" - "> +\tCPU5: cpu@10001 {\n" + "> +\tCPU5: cpu at 10001 {\n" "> +\t\tdevice_type = \"cpu\";\n" "> +\t\tcompatible = \"arm,cortex-a57\";\n" "> +\t\treg = <0x0 0x10001>;\n" @@ -491,7 +467,7 @@ "> +\t\t\t\t &CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>;\n" "> +\t};\n" "> +\n" - "> +\tCPU6: cpu@10100 {\n" + "> +\tCPU6: cpu at 10100 {\n" "> +\t\tdevice_type = \"cpu\";\n" "> +\t\tcompatible = \"arm,cortex-a57\";\n" "> +\t\treg = <0x0 0x10100>;\n" @@ -500,7 +476,7 @@ "> +\t\t\t\t &CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>;\n" "> +\t};\n" "> +\n" - "> +\tCPU7: cpu@10101 {\n" + "> +\tCPU7: cpu at 10101 {\n" "> +\t\tdevice_type = \"cpu\";\n" "> +\t\tcompatible = \"arm,cortex-a57\";\n" "> +\t\treg = <0x0 0x10101>;\n" @@ -509,7 +485,7 @@ "> +\t\t\t\t &CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>;\n" "> +\t};\n" "> +\n" - "> +\tCPU8: cpu@100000000 {\n" + "> +\tCPU8: cpu at 100000000 {\n" "> +\t\tdevice_type = \"cpu\";\n" "> +\t\tcompatible = \"arm,cortex-a53\";\n" "> +\t\treg = <0x1 0x0>;\n" @@ -518,7 +494,7 @@ "> +\t\t\t\t &CLUSTER_RETENTION_1 &CLUSTER_SLEEP_1>;\n" "> +\t};\n" "> +\n" - "> +\tCPU9: cpu@100000001 {\n" + "> +\tCPU9: cpu at 100000001 {\n" "> +\t\tdevice_type = \"cpu\";\n" "> +\t\tcompatible = \"arm,cortex-a53\";\n" "> +\t\treg = <0x1 0x1>;\n" @@ -527,7 +503,7 @@ "> +\t\t\t\t &CLUSTER_RETENTION_1 &CLUSTER_SLEEP_1>;\n" "> +\t};\n" "> +\n" - "> +\tCPU10: cpu@100000100 {\n" + "> +\tCPU10: cpu at 100000100 {\n" "> +\t\tdevice_type = \"cpu\";\n" "> +\t\tcompatible = \"arm,cortex-a53\";\n" "> +\t\treg = <0x1 0x100>;\n" @@ -536,7 +512,7 @@ "> +\t\t\t\t &CLUSTER_RETENTION_1 &CLUSTER_SLEEP_1>;\n" "> +\t};\n" "> +\n" - "> +\tCPU11: cpu@100000101 {\n" + "> +\tCPU11: cpu at 100000101 {\n" "> +\t\tdevice_type = \"cpu\";\n" "> +\t\tcompatible = \"arm,cortex-a53\";\n" "> +\t\treg = <0x1 0x101>;\n" @@ -545,7 +521,7 @@ "> +\t\t\t\t &CLUSTER_RETENTION_1 &CLUSTER_SLEEP_1>;\n" "> +\t};\n" "> +\n" - "> +\tCPU12: cpu@100010000 {\n" + "> +\tCPU12: cpu at 100010000 {\n" "> +\t\tdevice_type = \"cpu\";\n" "> +\t\tcompatible = \"arm,cortex-a53\";\n" "> +\t\treg = <0x1 0x10000>;\n" @@ -554,7 +530,7 @@ "> +\t\t\t\t &CLUSTER_RETENTION_1 &CLUSTER_SLEEP_1>;\n" "> +\t};\n" "> +\n" - "> +\tCPU13: cpu@100010001 {\n" + "> +\tCPU13: cpu at 100010001 {\n" "> +\t\tdevice_type = \"cpu\";\n" "> +\t\tcompatible = \"arm,cortex-a53\";\n" "> +\t\treg = <0x1 0x10001>;\n" @@ -563,7 +539,7 @@ "> +\t\t\t\t &CLUSTER_RETENTION_1 &CLUSTER_SLEEP_1>;\n" "> +\t};\n" "> +\n" - "> +\tCPU14: cpu@100010100 {\n" + "> +\tCPU14: cpu at 100010100 {\n" "> +\t\tdevice_type = \"cpu\";\n" "> +\t\tcompatible = \"arm,cortex-a53\";\n" "> +\t\treg = <0x1 0x10100>;\n" @@ -572,7 +548,7 @@ "> +\t\t\t\t &CLUSTER_RETENTION_1 &CLUSTER_SLEEP_1>;\n" "> +\t};\n" "> +\n" - "> +\tCPU15: cpu@100010101 {\n" + "> +\tCPU15: cpu at 100010101 {\n" "> +\t\tdevice_type = \"cpu\";\n" "> +\t\tcompatible = \"arm,cortex-a53\";\n" "> +\t\treg = <0x1 0x10101>;\n" @@ -668,56 +644,56 @@ "> +\t#size-cells = <0>;\n" "> +\t#address-cells = <1>;\n" "> +\n" - "> +\tCPU0: cpu@0 {\n" + "> +\tCPU0: cpu at 0 {\n" "> +\t\tdevice_type = \"cpu\";\n" "> +\t\tcompatible = \"arm,cortex-a15\";\n" "> +\t\treg = <0x0>;\n" "> +\t\tcpu-idle-states = <&CPU_SLEEP_0_0 &CLUSTER_SLEEP_0>;\n" "> +\t};\n" "> +\n" - "> +\tCPU1: cpu@1 {\n" + "> +\tCPU1: cpu at 1 {\n" "> +\t\tdevice_type = \"cpu\";\n" "> +\t\tcompatible = \"arm,cortex-a15\";\n" "> +\t\treg = <0x1>;\n" "> +\t\tcpu-idle-states = <&CPU_SLEEP_0_0 &CLUSTER_SLEEP_0>;\n" "> +\t};\n" "> +\n" - "> +\tCPU2: cpu@2 {\n" + "> +\tCPU2: cpu at 2 {\n" "> +\t\tdevice_type = \"cpu\";\n" "> +\t\tcompatible = \"arm,cortex-a15\";\n" "> +\t\treg = <0x2>;\n" "> +\t\tcpu-idle-states = <&CPU_SLEEP_0_0 &CLUSTER_SLEEP_0>;\n" "> +\t};\n" "> +\n" - "> +\tCPU3: cpu@3 {\n" + "> +\tCPU3: cpu at 3 {\n" "> +\t\tdevice_type = \"cpu\";\n" "> +\t\tcompatible = \"arm,cortex-a15\";\n" "> +\t\treg = <0x3>;\n" "> +\t\tcpu-idle-states = <&CPU_SLEEP_0_0 &CLUSTER_SLEEP_0>;\n" "> +\t};\n" "> +\n" - "> +\tCPU4: cpu@100 {\n" + "> +\tCPU4: cpu at 100 {\n" "> +\t\tdevice_type = \"cpu\";\n" "> +\t\tcompatible = \"arm,cortex-a7\";\n" "> +\t\treg = <0x100>;\n" "> +\t\tcpu-idle-states = <&CPU_SLEEP_1_0 &CLUSTER_SLEEP_1>;\n" "> +\t};\n" "> +\n" - "> +\tCPU5: cpu@101 {\n" + "> +\tCPU5: cpu at 101 {\n" "> +\t\tdevice_type = \"cpu\";\n" "> +\t\tcompatible = \"arm,cortex-a7\";\n" "> +\t\treg = <0x101>;\n" "> +\t\tcpu-idle-states = <&CPU_SLEEP_1_0 &CLUSTER_SLEEP_1>;\n" "> +\t};\n" "> +\n" - "> +\tCPU6: cpu@102 {\n" + "> +\tCPU6: cpu at 102 {\n" "> +\t\tdevice_type = \"cpu\";\n" "> +\t\tcompatible = \"arm,cortex-a7\";\n" "> +\t\treg = <0x102>;\n" "> +\t\tcpu-idle-states = <&CPU_SLEEP_1_0 &CLUSTER_SLEEP_1>;\n" "> +\t};\n" "> +\n" - "> +\tCPU7: cpu@103 {\n" + "> +\tCPU7: cpu at 103 {\n" "> +\t\tdevice_type = \"cpu\";\n" "> +\t\tcompatible = \"arm,cortex-a7\";\n" "> +\t\treg = <0x103>;\n" @@ -822,10 +798,10 @@ "\n" "\n" "-- \n" - " <http://www.linaro.org/> Linaro.org \342\224\202 Open source software for ARM SoCs\n" + " <http://www.linaro.org/> Linaro.org ? Open source software for ARM SoCs\n" "\n" "Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |\n" "<http://twitter.com/#!/linaroorg> Twitter |\n" <http://www.linaro.org/linaro-blog/> Blog -fbf5446dcc1530d67783c5f05c0e9ad9be80ccbfe33b482b5999cb390a9762de +5fe05246f8a27c5ee2f8836406cabf9f3d07e869e04585fa30a85b9f80233557
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.