From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by yocto-www.yoctoproject.org (Postfix, from userid 118) id BBC65E00736; Thu, 24 Jul 2014 08:16:59 -0700 (PDT) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on yocto-www.yoctoproject.org X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00 autolearn=ham version=3.3.1 X-Spam-HAM-Report: * -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% * [score: 0.0000] Received: from mail.chez-thomas.org (mail.mlbassoc.com [65.100.170.105]) by yocto-www.yoctoproject.org (Postfix) with ESMTP id B9D64E006C4 for ; Thu, 24 Jul 2014 08:16:52 -0700 (PDT) Received: by mail.chez-thomas.org (Postfix, from userid 1998) id 21E03F811FC; Thu, 24 Jul 2014 09:16:51 -0600 (MDT) Received: from [192.168.1.114] (zeus [192.168.1.114]) by mail.chez-thomas.org (Postfix) with ESMTP id 0A393F811F8; Thu, 24 Jul 2014 09:16:50 -0600 (MDT) Message-ID: <53D12367.1010403@mlbassoc.com> Date: Thu, 24 Jul 2014 09:16:55 -0600 From: Gary Thomas User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.0 MIME-Version: 1.0 To: Alexandre Belloni References: <53D11B65.4010807@mlbassoc.com> <20140724151259.GB9532@piout.net> In-Reply-To: <20140724151259.GB9532@piout.net> Cc: "meta-freescale@yoctoproject.org" Subject: Re: [OT] Kernel device tree question X-BeenThere: meta-freescale@yoctoproject.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Usage and development list for the meta-fsl-* layers List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 24 Jul 2014 15:16:59 -0000 Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit On 2014-07-24 09:13, Alexandre Belloni wrote: > Hi, > > On 24/07/2014 at 08:42:45 -0600, Gary Thomas wrote : >> I have a board (i.MX53) that I need to adjust one of the main >> clocks (CKO1). The default setting uses the main CPU clock >> and I need to change it to use one of the PLL based clocks. >> I can see where this selector is available as cko1_sel, but >> it's not clear to me if/where/how I can set this to be pll3_sw >> in the device tree (which in the modern world is the only place >> for target platform configuration and control). > > Actually, this is exactly what DT is not supposed to be used for. The > device tree must only describe the hardware and the configuration must > be avoided. > >> >> Any ideas or pointers? >> > > cko1_sel seems to be declared correctly as a mux so pll3_sw should be > selected automatically when you need it, by setting ck01. How/where can I do this? As I understand it, the only place I can make such a setup is in the device tree file as that's the only thing unique for my board. Thanks -- ------------------------------------------------------------ Gary Thomas | Consulting for the MLB Associates | Embedded world ------------------------------------------------------------