From: monstr@monstr.eu (Michal Simek)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH] ARM: zynq: DT: Add CAN node
Date: Fri, 25 Jul 2014 08:47:05 +0200 [thread overview]
Message-ID: <53D1FD69.4020109@monstr.eu> (raw)
In-Reply-To: <d973d7c8-30e7-458e-9d57-15da917cde04@BL2FFO11FD030.protection.gbl>
On 07/24/2014 05:55 PM, S?ren Brinkmann wrote:
> On Thu, 2014-07-24 at 08:44AM +0200, Michal Simek wrote:
>> On 07/23/2014 06:07 PM, S?ren Brinkmann wrote:
>>> On Wed, 2014-07-23 at 03:05PM +0200, Michal Simek wrote:
>>>> Add node describing Zynq's CAN controller.
>>>>
>>>> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
>>>> ---
>>>>
>>>> arch/arm/boot/dts/zynq-7000.dtsi | 13 ++++++++++++-
>>>> 1 file changed, 12 insertions(+), 1 deletion(-)
>>>>
>>>> diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi
>>>> index 366ca6434f54..2287d9b4ed1a 100644
>>>> --- a/arch/arm/boot/dts/zynq-7000.dtsi
>>>> +++ b/arch/arm/boot/dts/zynq-7000.dtsi
>>>> @@ -71,7 +71,18 @@
>>>> interrupts = <0 7 4>;
>>>> interrupt-parent = <&intc>;
>>>> clocks = <&clkc 12>;
>>>> - };
>>>> + };
>>>> +
>>>> + can0: can at e0008000 {
>>>> + compatible = "xlnx,zynq-can-1.0";
>>>> + clocks = <&clkc 19>, <&clkc 36>;
>>>> + clock-names = "can_clk", "pclk";
>>>> + reg = <0xe0008000 0x1000>;
>>>> + interrupts = <0 28 4>;
>>>> + interrupt-parent = <&intc>;
>>>> + tx-fifo-depth = <0x40>;
>>>> + rx-fifo-depth = <0x40>;
>>>> + };
>>>
>>> What about the second CAN core? You also probably want to add
>>> 'status = "disabled"' in the dtsi.
>>
>> Second can core - yes.
>>
>> I can add status = "disabled" but then question is if make
>> sense to change status for any zynq dts file. Or just
>> keep enable both.
>>
>> In our repo is enabled can0 on zc702.
>>
>> What do you think?
>
> Well, it should be enabled on boards that have CAN pinned out. Does any
> of our boards have that?
I have checked and only can0 for zc702 should be enabled.
Let me send v2.
Thanks,
Michal
--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform
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WARNING: multiple messages have this Message-ID (diff)
From: Michal Simek <monstr-pSz03upnqPeHXe+LvDLADg@public.gmane.org>
To: "Sören Brinkmann"
<soren.brinkmann-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org>,
"Michal Simek"
<michal.simek-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org>
Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
Josh Cartwright <josh.cartwright-acOepvfBmUk@public.gmane.org>,
Steffen Trumtrar
<s.trumtrar-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>,
Rob Herring <robherring2-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
Peter Crosthwaite
<peter.crosthwaite-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org>,
Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
Pawel Moll <pawel.moll-5wv7dgnIgG8@public.gmane.org>,
Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
Ian Campbell
<ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org>,
Kumar Gala <galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>,
Russell King <linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org>,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: Re: [PATCH] ARM: zynq: DT: Add CAN node
Date: Fri, 25 Jul 2014 08:47:05 +0200 [thread overview]
Message-ID: <53D1FD69.4020109@monstr.eu> (raw)
In-Reply-To: <d973d7c8-30e7-458e-9d57-15da917cde04-xjCwUguQ55/6NczZJL2rHmYJ4DzVTqeXkX/xN29GLwg@public.gmane.org>
[-- Attachment #1: Type: text/plain, Size: 2115 bytes --]
On 07/24/2014 05:55 PM, Sören Brinkmann wrote:
> On Thu, 2014-07-24 at 08:44AM +0200, Michal Simek wrote:
>> On 07/23/2014 06:07 PM, Sören Brinkmann wrote:
>>> On Wed, 2014-07-23 at 03:05PM +0200, Michal Simek wrote:
>>>> Add node describing Zynq's CAN controller.
>>>>
>>>> Signed-off-by: Michal Simek <michal.simek-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org>
>>>> ---
>>>>
>>>> arch/arm/boot/dts/zynq-7000.dtsi | 13 ++++++++++++-
>>>> 1 file changed, 12 insertions(+), 1 deletion(-)
>>>>
>>>> diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi
>>>> index 366ca6434f54..2287d9b4ed1a 100644
>>>> --- a/arch/arm/boot/dts/zynq-7000.dtsi
>>>> +++ b/arch/arm/boot/dts/zynq-7000.dtsi
>>>> @@ -71,7 +71,18 @@
>>>> interrupts = <0 7 4>;
>>>> interrupt-parent = <&intc>;
>>>> clocks = <&clkc 12>;
>>>> - };
>>>> + };
>>>> +
>>>> + can0: can@e0008000 {
>>>> + compatible = "xlnx,zynq-can-1.0";
>>>> + clocks = <&clkc 19>, <&clkc 36>;
>>>> + clock-names = "can_clk", "pclk";
>>>> + reg = <0xe0008000 0x1000>;
>>>> + interrupts = <0 28 4>;
>>>> + interrupt-parent = <&intc>;
>>>> + tx-fifo-depth = <0x40>;
>>>> + rx-fifo-depth = <0x40>;
>>>> + };
>>>
>>> What about the second CAN core? You also probably want to add
>>> 'status = "disabled"' in the dtsi.
>>
>> Second can core - yes.
>>
>> I can add status = "disabled" but then question is if make
>> sense to change status for any zynq dts file. Or just
>> keep enable both.
>>
>> In our repo is enabled can0 on zc702.
>>
>> What do you think?
>
> Well, it should be enabled on boards that have CAN pinned out. Does any
> of our boards have that?
I have checked and only can0 for zc702 should be enabled.
Let me send v2.
Thanks,
Michal
--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform
[-- Attachment #2: OpenPGP digital signature --]
[-- Type: application/pgp-signature, Size: 263 bytes --]
WARNING: multiple messages have this Message-ID (diff)
From: Michal Simek <monstr@monstr.eu>
To: "Sören Brinkmann" <soren.brinkmann@xilinx.com>,
"Michal Simek" <michal.simek@xilinx.com>
Cc: linux-arm-kernel@lists.infradead.org,
Josh Cartwright <josh.cartwright@ni.com>,
Steffen Trumtrar <s.trumtrar@pengutronix.de>,
Rob Herring <robherring2@gmail.com>,
Peter Crosthwaite <peter.crosthwaite@xilinx.com>,
Rob Herring <robh+dt@kernel.org>, Pawel Moll <pawel.moll@arm.com>,
Mark Rutland <mark.rutland@arm.com>,
Ian Campbell <ijc+devicetree@hellion.org.uk>,
Kumar Gala <galak@codeaurora.org>,
Russell King <linux@arm.linux.org.uk>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] ARM: zynq: DT: Add CAN node
Date: Fri, 25 Jul 2014 08:47:05 +0200 [thread overview]
Message-ID: <53D1FD69.4020109@monstr.eu> (raw)
In-Reply-To: <d973d7c8-30e7-458e-9d57-15da917cde04@BL2FFO11FD030.protection.gbl>
[-- Attachment #1: Type: text/plain, Size: 2086 bytes --]
On 07/24/2014 05:55 PM, Sören Brinkmann wrote:
> On Thu, 2014-07-24 at 08:44AM +0200, Michal Simek wrote:
>> On 07/23/2014 06:07 PM, Sören Brinkmann wrote:
>>> On Wed, 2014-07-23 at 03:05PM +0200, Michal Simek wrote:
>>>> Add node describing Zynq's CAN controller.
>>>>
>>>> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
>>>> ---
>>>>
>>>> arch/arm/boot/dts/zynq-7000.dtsi | 13 ++++++++++++-
>>>> 1 file changed, 12 insertions(+), 1 deletion(-)
>>>>
>>>> diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi
>>>> index 366ca6434f54..2287d9b4ed1a 100644
>>>> --- a/arch/arm/boot/dts/zynq-7000.dtsi
>>>> +++ b/arch/arm/boot/dts/zynq-7000.dtsi
>>>> @@ -71,7 +71,18 @@
>>>> interrupts = <0 7 4>;
>>>> interrupt-parent = <&intc>;
>>>> clocks = <&clkc 12>;
>>>> - };
>>>> + };
>>>> +
>>>> + can0: can@e0008000 {
>>>> + compatible = "xlnx,zynq-can-1.0";
>>>> + clocks = <&clkc 19>, <&clkc 36>;
>>>> + clock-names = "can_clk", "pclk";
>>>> + reg = <0xe0008000 0x1000>;
>>>> + interrupts = <0 28 4>;
>>>> + interrupt-parent = <&intc>;
>>>> + tx-fifo-depth = <0x40>;
>>>> + rx-fifo-depth = <0x40>;
>>>> + };
>>>
>>> What about the second CAN core? You also probably want to add
>>> 'status = "disabled"' in the dtsi.
>>
>> Second can core - yes.
>>
>> I can add status = "disabled" but then question is if make
>> sense to change status for any zynq dts file. Or just
>> keep enable both.
>>
>> In our repo is enabled can0 on zc702.
>>
>> What do you think?
>
> Well, it should be enabled on boards that have CAN pinned out. Does any
> of our boards have that?
I have checked and only can0 for zc702 should be enabled.
Let me send v2.
Thanks,
Michal
--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform
[-- Attachment #2: OpenPGP digital signature --]
[-- Type: application/pgp-signature, Size: 263 bytes --]
next prev parent reply other threads:[~2014-07-25 6:47 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-07-23 13:05 [PATCH] ARM: zynq: DT: Add CAN node Michal Simek
2014-07-23 13:05 ` Michal Simek
2014-07-23 16:07 ` Sören Brinkmann
2014-07-23 16:07 ` Sören Brinkmann
2014-07-23 16:07 ` Sören Brinkmann
[not found] ` <20140723160702.GA14564@xsjandreislx>
2014-07-24 6:44 ` Michal Simek
2014-07-24 6:44 ` Michal Simek
2014-07-24 6:44 ` Michal Simek
2014-07-24 15:55 ` Sören Brinkmann
2014-07-24 15:55 ` Sören Brinkmann
2014-07-24 15:55 ` Sören Brinkmann
2014-07-25 6:47 ` Michal Simek [this message]
2014-07-25 6:47 ` Michal Simek
2014-07-25 6:47 ` Michal Simek
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