diff for duplicates of <53D21887.2020305@suse.de> diff --git a/a/1.txt b/N1/1.txt index b166d96..142ffbc 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -2,8 +2,8 @@ Hash: SHA1 Am 25.07.2014 09:59, schrieb Michal Simek: -> On 07/25/2014 01:18 AM, S?ren Brinkmann wrote: ->> On Fri, 2014-07-25 at 01:00AM +0200, Andreas F?rber wrote: +> On 07/25/2014 01:18 AM, Sören Brinkmann wrote: +>> On Fri, 2014-07-25 at 01:00AM +0200, Andreas Färber wrote: >>> Prepare SPI0 and SPI1 while at it. > > Patch subject is incorrect. You are adding SPI and QSPI. @@ -12,7 +12,7 @@ Yes, it originally added only QSPI, but I considered it a good deed to add SPI as well while already reading that part of the TRM. :) >>> ->>> Signed-off-by: Andreas F?rber <afaerber@suse.de> --- v2: New +>>> Signed-off-by: Andreas Färber <afaerber@suse.de> --- v2: New >>> >>> arch/arm/boot/dts/zynq-7000.dtsi | 37 >>> +++++++++++++++++++++++++++++++++++ @@ -25,12 +25,12 @@ add SPI as well while already reading that part of the TRM. :) >>> b/arch/arm/boot/dts/zynq-7000.dtsi @@ -122,6 +122,30 @@ >>> interrupts = <0 50 4>; }; >>> ->>> + spi0: spi at e0006000 { + compatible = "xlnx,zynq-spi-r1p6"; +>>> + spi0: spi@e0006000 { + compatible = "xlnx,zynq-spi-r1p6"; >>> + reg = <0xe0006000 0x1000>; + status = "disabled"; + >>> interrupt-parent = <&intc>; + interrupts = <0 26 4>; + >>> clocks = <&clkc 25>, <&clkc 34>; + clock-names = "ref_clk", >>> "pclk"; + #address-cells = <1>; + #size-cells = <0>; + }; ->>> + + spi1: spi at e0007000 { + compatible = +>>> + + spi1: spi@e0007000 { + compatible = >>> "xlnx,zynq-spi-r1p6"; + reg = <0xe0007000 0x1000>; + status >>> = "disabled"; + interrupt-parent = <&intc>; + interrupts = >>> <0 49 4>; + clocks = <&clkc 26>, <&clkc 35>; + clock-names @@ -38,11 +38,11 @@ add SPI as well while already reading that part of the TRM. :) >>> = <0>; + }; + >> Until here things look good. >> ->>> gem0: ethernet at e000b000 { compatible = "cdns,gem"; reg = +>>> gem0: ethernet@e000b000 { compatible = "cdns,gem"; reg = >>> <0xe000b000 0x4000>; @@ -140,6 +164,19 @@ clock-names = "pclk", >>> "hclk", "tx_clk"; }; >>> ->>> + qspi: qspi at e000d000 { + compatible = +>>> + qspi: qspi@e000d000 { + compatible = >>> "xlnx,zynq-spi-r1p6"; + reg = <0xe000d000 0x1000>; + status >>> = "disabled"; + interrupt-parent = <&intc>; + interrupts = >>> <0 19 4>; + clocks = <&clkc 10>, <&clkc 43>; + clock-names @@ -79,8 +79,8 @@ Thanks, Andreas - -- -SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 N?rnberg, Germany -GF: Jeff Hawn, Jennifer Guild, Felix Imend?rffer; HRB 16746 AG N?rnberg +SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany +GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.22 (GNU/Linux) diff --git a/a/content_digest b/N1/content_digest index 73b736f..133e9c6 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -2,18 +2,33 @@ "ref\01406242820-20140-6-git-send-email-afaerber@suse.de\0" "ref\0ddb38ce5-9e31-4c94-967c-7784c7fba75c@BN1BFFO11FD028.protection.gbl\0" "ref\053D20E5B.9070501@monstr.eu\0" - "From\0afaerber@suse.de (Andreas F\303\244rber)\0" - "Subject\0[PATCH v2 05/11] ARM: dts: zynq: Add QSPI for Parallella\0" + "From\0Andreas F\303\244rber <afaerber@suse.de>\0" + "Subject\0Re: [PATCH v2 05/11] ARM: dts: zynq: Add QSPI for Parallella\0" "Date\0Fri, 25 Jul 2014 10:42:47 +0200\0" - "To\0linux-arm-kernel@lists.infradead.org\0" + "To\0monstr@monstr.eu" + " S\303\266ren Brinkmann <soren.brinkmann@xilinx.com>\0" + "Cc\0Harini Katakam <harinik@xilinx.com>" + Michal Simek <michal.simek@xilinx.com> + Andreas Olofsson <andreas@adapteva.com> + Matteo Vit <matteo.vit@starwaredesign.com> + Sean Rickerd <srickerd@suse.com> + devicetree@vger.kernel.org + linux-arm-kernel@lists.infradead.org + linux-kernel@vger.kernel.org + Rob Herring <robh+dt@kernel.org> + Pawel Moll <pawel.moll@arm.com> + Mark Rutland <mark.rutland@arm.com> + Ian Campbell <ijc+devicetree@hellion.org.uk> + Kumar Gala <galak@codeaurora.org> + " Russell King <linux@arm.linux.org.uk>\0" "\00:1\0" "b\0" "-----BEGIN PGP SIGNED MESSAGE-----\n" "Hash: SHA1\n" "\n" "Am 25.07.2014 09:59, schrieb Michal Simek:\n" - "> On 07/25/2014 01:18 AM, S?ren Brinkmann wrote:\n" - ">> On Fri, 2014-07-25 at 01:00AM +0200, Andreas F?rber wrote:\n" + "> On 07/25/2014 01:18 AM, S\303\266ren Brinkmann wrote:\n" + ">> On Fri, 2014-07-25 at 01:00AM +0200, Andreas F\303\244rber wrote:\n" ">>> Prepare SPI0 and SPI1 while at it.\n" "> \n" "> Patch subject is incorrect. You are adding SPI and QSPI.\n" @@ -22,7 +37,7 @@ "add SPI as well while already reading that part of the TRM. :)\n" "\n" ">>> \n" - ">>> Signed-off-by: Andreas F?rber <afaerber@suse.de> --- v2: New\n" + ">>> Signed-off-by: Andreas F\303\244rber <afaerber@suse.de> --- v2: New\n" ">>> \n" ">>> arch/arm/boot/dts/zynq-7000.dtsi | 37\n" ">>> +++++++++++++++++++++++++++++++++++ \n" @@ -35,12 +50,12 @@ ">>> b/arch/arm/boot/dts/zynq-7000.dtsi @@ -122,6 +122,30 @@ \n" ">>> interrupts = <0 50 4>; };\n" ">>> \n" - ">>> +\t\tspi0: spi at e0006000 { +\t\t\tcompatible = \"xlnx,zynq-spi-r1p6\"; \n" + ">>> +\t\tspi0: spi@e0006000 { +\t\t\tcompatible = \"xlnx,zynq-spi-r1p6\"; \n" ">>> +\t\t\treg = <0xe0006000 0x1000>; +\t\t\tstatus = \"disabled\"; +\n" ">>> interrupt-parent = <&intc>; +\t\t\tinterrupts = <0 26 4>; +\n" ">>> clocks = <&clkc 25>, <&clkc 34>; +\t\t\tclock-names = \"ref_clk\",\n" ">>> \"pclk\"; +\t\t\t#address-cells = <1>; +\t\t\t#size-cells = <0>; +\t\t}; \n" - ">>> + +\t\tspi1: spi at e0007000 { +\t\t\tcompatible =\n" + ">>> + +\t\tspi1: spi@e0007000 { +\t\t\tcompatible =\n" ">>> \"xlnx,zynq-spi-r1p6\"; +\t\t\treg = <0xe0007000 0x1000>; +\t\t\tstatus\n" ">>> = \"disabled\"; +\t\t\tinterrupt-parent = <&intc>; +\t\t\tinterrupts =\n" ">>> <0 49 4>; +\t\t\tclocks = <&clkc 26>, <&clkc 35>; +\t\t\tclock-names\n" @@ -48,11 +63,11 @@ ">>> = <0>; +\t\t}; +\n" ">> Until here things look good.\n" ">> \n" - ">>> gem0: ethernet at e000b000 { compatible = \"cdns,gem\"; reg =\n" + ">>> gem0: ethernet@e000b000 { compatible = \"cdns,gem\"; reg =\n" ">>> <0xe000b000 0x4000>; @@ -140,6 +164,19 @@ clock-names = \"pclk\",\n" ">>> \"hclk\", \"tx_clk\"; };\n" ">>> \n" - ">>> +\t\tqspi: qspi at e000d000 { +\t\t\tcompatible =\n" + ">>> +\t\tqspi: qspi@e000d000 { +\t\t\tcompatible =\n" ">>> \"xlnx,zynq-spi-r1p6\"; +\t\t\treg = <0xe000d000 0x1000>; +\t\t\tstatus\n" ">>> = \"disabled\"; +\t\t\tinterrupt-parent = <&intc>; +\t\t\tinterrupts =\n" ">>> <0 19 4>; +\t\t\tclocks = <&clkc 10>, <&clkc 43>; +\t\t\tclock-names\n" @@ -89,8 +104,8 @@ "Andreas\n" "\n" "- -- \n" - "SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 N?rnberg, Germany\n" - "GF: Jeff Hawn, Jennifer Guild, Felix Imend?rffer; HRB 16746 AG N?rnberg\n" + "SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 N\303\274rnberg, Germany\n" + "GF: Jeff Hawn, Jennifer Guild, Felix Imend\303\266rffer; HRB 16746 AG N\303\274rnberg\n" "-----BEGIN PGP SIGNATURE-----\n" "Version: GnuPG v2.0.22 (GNU/Linux)\n" "\n" @@ -109,4 +124,4 @@ "=h5eC\n" -----END PGP SIGNATURE----- -818f87bd80cbc9377ce6c7f8e002d4d19bf55621a6a6728366ea09f0f40a0065 +23e93f853fd3937984d0732381d63dbc92985aad4b0c112e2efe27019c810682
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