From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:51328) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XAh3c-0004GB-Sm for qemu-devel@nongnu.org; Fri, 25 Jul 2014 11:05:22 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XAh3W-0006zL-JP for qemu-devel@nongnu.org; Fri, 25 Jul 2014 11:05:16 -0400 Received: from smtp.codeaurora.org ([198.145.11.231]:57910) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XAh3W-0006z3-EQ for qemu-devel@nongnu.org; Fri, 25 Jul 2014 11:05:10 -0400 Message-ID: <53D27222.6030505@codeaurora.org> Date: Fri, 25 Jul 2014 11:05:06 -0400 From: Christopher Covington MIME-Version: 1.0 References: <53D2632D.4070700@codeaurora.org> <53D26B43.80109@codeaurora.org> In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] AArch64 ELF File Loading List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell Cc: "qemu-devel@nongnu.org" Hi Peter, On 07/25/2014 10:41 AM, Peter Maydell wrote: > On 25 July 2014 15:35, Christopher Covington wrote: >> qemu-system-aarch64 -nodefaults -nographic -monitor none -M virt \ >> -cpu cortex-a57 -m 3G -semihosting -kernel hello >> >> qemu: fatal: Trying to execute code outside RAM or ROM at 0x0000000000000000 > > This means your code took an exception (and there's > no RAM at the low address where the vector table is > by default). Try "-d in_asm,exec,int" to get a better idea > of what's being executed. qemu-system-aarch64 -nodefaults -nographic -monitor none \ -M virt -cpu cortex-a57 -m 3G -semihosting -kernel hello \ -d in_asm,exec,int qemu: fatal: Trying to execute code outside RAM or ROM at 0x0000000000000000 PC=0000000000000000 SP=0000000000000000 X00=0000000000000000 X01=0000000000000000 X02=0000000000000000 ... The binary runs fine on at least one other simulator. > Also, where do you expect the output from that printf > to be going? Does your gcc/bare metal libc write to > the UART? How does it know what address the UART is? > If it's expecting to do semihosting for output, then you're > running into the fact that we don't implement semihosting > for AArch64 yet. I have local patches adding semihosting for AArch64. I hope eventually be able to share them and other changes, but the approvals will likely take a while longer. Here is an example that doesn't use semihosting. wget http://releases.linaro.org/14.06/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.9-2014.06-02_linux.tar.xz tar xf gcc-linaro-aarch64-none-elf-4.9-2014.06-02_linux.tar.xz echo '.global _start _start: mrs x0, midr_el1 b _start' > hello.S gcc-linaro-aarch64-none-elf-4.9-2014.06-02_linux/bin/aarch64-none-elf-gcc \ -nostdlib -Ttext=0x40000000 hello.S -o hello qemu-system-aarch64 -nodefaults -nographic -monitor none -M virt \ -cpu cortex-a57 -m 3G -semihosting -kernel hello -d in_asm,exec,int qemu: fatal: Trying to execute code outside RAM or ROM at 0x0000000000000000 Thanks, Christopher -- Employee of Qualcomm Innovation Center, Inc. Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by the Linux Foundation.