From: Julien Grall <julien.grall@linaro.org>
To: Ian Campbell <Ian.Campbell@citrix.com>
Cc: xen-devel@lists.xen.org, tim@xen.org, stefano.stabellini@eu.citrix.com
Subject: Re: [PATCH 2/2] xen: arm: update arm32 assembly primitives to Linux v3.16-rc6
Date: Fri, 25 Jul 2014 17:20:56 +0100 [thread overview]
Message-ID: <53D283E8.4000709@linaro.org> (raw)
In-Reply-To: <1406304831.24842.54.camel@kazak.uk.xensource.com>
On 07/25/2014 05:13 PM, Ian Campbell wrote:
> On Fri, 2014-07-25 at 17:03 +0100, Ian Campbell wrote:
>> On Fri, 2014-07-25 at 16:48 +0100, Julien Grall wrote:
>>> On 07/25/2014 04:48 PM, Ian Campbell wrote:
>>>> On Fri, 2014-07-25 at 16:42 +0100, Julien Grall wrote:
>>>>> Hi Ian,
>>>>>
>>>>> On 07/25/2014 04:22 PM, Ian Campbell wrote:
>>>>>> bitops, cmpxchg, atomics: Import:
>>>>>> c32ffce ARM: 7984/1: prefetch: add prefetchw invocations for barriered atomics
>>>>>
>>>>> Compare to Linux we don't have specific prefetch* helpers. We directly
>>>>> use the compiler builtin ones. Shouldn't we import the ARM specific
>>>>> helpers to gain in performance?
>>>>
>>>> My binaries are full of pld instructions where I think I would expect
>>>> them, so it seems like the compiler builtin ones are sufficient.
>>>>
>>>> I suspect the Linux define is there to cope with older compilers or
>>>> something.
>>>
>>> If so:
>>
>> The compiled output is very different if I use the arch specific
>> explicit variants. The explicit variant generates (lots) more pldw and
>> (somewhat) fewer pld. I've no idea what this means...
>
> It's a bit more obvious for aarch64 where gcc 4.8 doesn't generate any
> prefetches at all via the builtins...
>
> Here's what I've got in my tree. I've no idea if we should take some or
> all of it...
I don't think it will be harmful for ARMv7 to use specific prefetch*
helpers.
[..]
> +/*
> + * Prefetching support
> + */
> +#define ARCH_HAS_PREFETCH
> +static inline void prefetch(const void *ptr)
> +{
> + asm volatile("prfm pldl1keep, %a0\n" : : "p" (ptr));
> +}
> +
> +#define ARCH_HAS_PREFETCHW
> +static inline void prefetchw(const void *ptr)
> +{
> + asm volatile("prfm pstl1keep, %a0\n" : : "p" (ptr));
> +}
> +
> +#define ARCH_HAS_SPINLOCK_PREFETCH
> +static inline void spin_lock_prefetch(const void *x)
> +{
> + prefetchw(x);
> +}
Looking to the code. spin_lock_prefetch is called in the tree. I'm not
sure we should keep this helper.
Regards,
--
Julien Grall
next prev parent reply other threads:[~2014-07-25 16:20 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-07-25 15:22 [PATCH 1/2] xen: arm: update arm64 assembly primitives to Linux v3.16-rc6 Ian Campbell
2014-07-25 15:22 ` [PATCH 2/2] xen: arm: update arm32 " Ian Campbell
2014-07-25 15:42 ` Julien Grall
2014-07-25 15:48 ` Ian Campbell
2014-07-25 15:48 ` Julien Grall
2014-07-25 16:03 ` Ian Campbell
2014-07-25 16:13 ` Ian Campbell
2014-07-25 16:20 ` Julien Grall [this message]
2014-07-25 16:17 ` Julien Grall
2014-07-25 16:23 ` Ian Campbell
2014-07-25 15:36 ` [PATCH 1/2] xen: arm: update arm64 " Julien Grall
2014-08-04 16:16 ` Ian Campbell
2014-07-25 15:43 ` Ian Campbell
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