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* [PATCH 1/3] drm/radeon: Use write-combined CPU mappings of ring buffers with PCIe
@ 2014-07-29  9:47 Michel Dänzer
  2014-07-29  9:47 ` [PATCH 2/3] drm/radeon: Use write-combined CPU mappings of IBs on >= CIK Michel Dänzer
                   ` (2 more replies)
  0 siblings, 3 replies; 5+ messages in thread
From: Michel Dänzer @ 2014-07-29  9:47 UTC (permalink / raw)
  To: dri-devel

From: Michel Dänzer <michel.daenzer@amd.com>

PCI GART doesn't support unsnooped access. AGP GART already uses
write-combined CPU mappings.

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
---
 drivers/gpu/drm/radeon/radeon_ring.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/radeon/radeon_ring.c b/drivers/gpu/drm/radeon/radeon_ring.c
index 71439f0..7cfea7e 100644
--- a/drivers/gpu/drm/radeon/radeon_ring.c
+++ b/drivers/gpu/drm/radeon/radeon_ring.c
@@ -640,7 +640,9 @@ int radeon_ring_init(struct radeon_device *rdev, struct radeon_ring *ring, unsig
 	/* Allocate ring buffer */
 	if (ring->ring_obj == NULL) {
 		r = radeon_bo_create(rdev, ring->ring_size, PAGE_SIZE, true,
-				     RADEON_GEM_DOMAIN_GTT, 0,
+				     RADEON_GEM_DOMAIN_GTT,
+				     (rdev->flags & RADEON_IS_PCIE) ?
+				     RADEON_GEM_GTT_WC : 0,
 				     NULL, &ring->ring_obj);
 		if (r) {
 			dev_err(rdev->dev, "(%d) ring create failed\n", r);
-- 
2.0.1

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^ permalink raw reply related	[flat|nested] 5+ messages in thread

* [PATCH 2/3] drm/radeon: Use write-combined CPU mappings of IBs on >= CIK
  2014-07-29  9:47 [PATCH 1/3] drm/radeon: Use write-combined CPU mappings of ring buffers with PCIe Michel Dänzer
@ 2014-07-29  9:47 ` Michel Dänzer
  2014-07-29  9:47 ` [PATCH 3/3] drm/radeon/cik: Read back SDMA WPTR register after writing it Michel Dänzer
  2014-07-29  9:54 ` [PATCH 1/3] drm/radeon: Use write-combined CPU mappings of ring buffers with PCIe Christian König
  2 siblings, 0 replies; 5+ messages in thread
From: Michel Dänzer @ 2014-07-29  9:47 UTC (permalink / raw)
  To: dri-devel

From: Michel Dänzer <michel.daenzer@amd.com>

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
---
 drivers/gpu/drm/radeon/radeon_ring.c | 20 ++++++++++++++++----
 1 file changed, 16 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/radeon/radeon_ring.c b/drivers/gpu/drm/radeon/radeon_ring.c
index 7cfea7e..20b0e4f 100644
--- a/drivers/gpu/drm/radeon/radeon_ring.c
+++ b/drivers/gpu/drm/radeon/radeon_ring.c
@@ -201,10 +201,22 @@ int radeon_ib_pool_init(struct radeon_device *rdev)
 	if (rdev->ib_pool_ready) {
 		return 0;
 	}
-	r = radeon_sa_bo_manager_init(rdev, &rdev->ring_tmp_bo,
-				      RADEON_IB_POOL_SIZE*64*1024,
-				      RADEON_GPU_PAGE_SIZE,
-				      RADEON_GEM_DOMAIN_GTT, 0);
+
+	if (rdev->family >= CHIP_BONAIRE) {
+		r = radeon_sa_bo_manager_init(rdev, &rdev->ring_tmp_bo,
+					      RADEON_IB_POOL_SIZE*64*1024,
+					      RADEON_GPU_PAGE_SIZE,
+					      RADEON_GEM_DOMAIN_GTT,
+					      RADEON_GEM_GTT_WC);
+	} else {
+		/* Before CIK, it's better to stick to cacheable GTT due
+		 * to the command stream checking
+		 */
+		r = radeon_sa_bo_manager_init(rdev, &rdev->ring_tmp_bo,
+					      RADEON_IB_POOL_SIZE*64*1024,
+					      RADEON_GPU_PAGE_SIZE,
+					      RADEON_GEM_DOMAIN_GTT, 0);
+	}
 	if (r) {
 		return r;
 	}
-- 
2.0.1

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^ permalink raw reply related	[flat|nested] 5+ messages in thread

* [PATCH 3/3] drm/radeon/cik: Read back SDMA WPTR register after writing it
  2014-07-29  9:47 [PATCH 1/3] drm/radeon: Use write-combined CPU mappings of ring buffers with PCIe Michel Dänzer
  2014-07-29  9:47 ` [PATCH 2/3] drm/radeon: Use write-combined CPU mappings of IBs on >= CIK Michel Dänzer
@ 2014-07-29  9:47 ` Michel Dänzer
  2014-07-29  9:54 ` [PATCH 1/3] drm/radeon: Use write-combined CPU mappings of ring buffers with PCIe Christian König
  2 siblings, 0 replies; 5+ messages in thread
From: Michel Dänzer @ 2014-07-29  9:47 UTC (permalink / raw)
  To: dri-devel

From: Michel Dänzer <michel.daenzer@amd.com>

For symmetry with other *_set_wptr hooks.

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
---
 drivers/gpu/drm/radeon/cik_sdma.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/radeon/cik_sdma.c b/drivers/gpu/drm/radeon/cik_sdma.c
index 73bd2b2..ec7c7b6 100644
--- a/drivers/gpu/drm/radeon/cik_sdma.c
+++ b/drivers/gpu/drm/radeon/cik_sdma.c
@@ -121,6 +121,7 @@ void cik_sdma_set_wptr(struct radeon_device *rdev,
 		reg = SDMA0_GFX_RB_WPTR + SDMA1_REGISTER_OFFSET;
 
 	WREG32(reg, (ring->wptr << 2) & 0x3fffc);
+	(void)RREG32(reg);
 }
 
 /**
-- 
2.0.1

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^ permalink raw reply related	[flat|nested] 5+ messages in thread

* Re: [PATCH 1/3] drm/radeon: Use write-combined CPU mappings of ring buffers with PCIe
  2014-07-29  9:47 [PATCH 1/3] drm/radeon: Use write-combined CPU mappings of ring buffers with PCIe Michel Dänzer
  2014-07-29  9:47 ` [PATCH 2/3] drm/radeon: Use write-combined CPU mappings of IBs on >= CIK Michel Dänzer
  2014-07-29  9:47 ` [PATCH 3/3] drm/radeon/cik: Read back SDMA WPTR register after writing it Michel Dänzer
@ 2014-07-29  9:54 ` Christian König
  2014-07-29 13:14   ` Alex Deucher
  2 siblings, 1 reply; 5+ messages in thread
From: Christian König @ 2014-07-29  9:54 UTC (permalink / raw)
  To: Michel Dänzer, dri-devel

Am 29.07.2014 um 11:47 schrieb Michel Dänzer:
> From: Michel Dänzer <michel.daenzer@amd.com>
>
> PCI GART doesn't support unsnooped access. AGP GART already uses
> write-combined CPU mappings.
>
> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>

For this series Reviewed-by: Christian König <christian.koenig@amd.com>

> ---
>   drivers/gpu/drm/radeon/radeon_ring.c | 4 +++-
>   1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/radeon/radeon_ring.c b/drivers/gpu/drm/radeon/radeon_ring.c
> index 71439f0..7cfea7e 100644
> --- a/drivers/gpu/drm/radeon/radeon_ring.c
> +++ b/drivers/gpu/drm/radeon/radeon_ring.c
> @@ -640,7 +640,9 @@ int radeon_ring_init(struct radeon_device *rdev, struct radeon_ring *ring, unsig
>   	/* Allocate ring buffer */
>   	if (ring->ring_obj == NULL) {
>   		r = radeon_bo_create(rdev, ring->ring_size, PAGE_SIZE, true,
> -				     RADEON_GEM_DOMAIN_GTT, 0,
> +				     RADEON_GEM_DOMAIN_GTT,
> +				     (rdev->flags & RADEON_IS_PCIE) ?
> +				     RADEON_GEM_GTT_WC : 0,
>   				     NULL, &ring->ring_obj);
>   		if (r) {
>   			dev_err(rdev->dev, "(%d) ring create failed\n", r);

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^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH 1/3] drm/radeon: Use write-combined CPU mappings of ring buffers with PCIe
  2014-07-29  9:54 ` [PATCH 1/3] drm/radeon: Use write-combined CPU mappings of ring buffers with PCIe Christian König
@ 2014-07-29 13:14   ` Alex Deucher
  0 siblings, 0 replies; 5+ messages in thread
From: Alex Deucher @ 2014-07-29 13:14 UTC (permalink / raw)
  To: Christian König; +Cc: Michel Dänzer, Maling list - DRI developers

On Tue, Jul 29, 2014 at 5:54 AM, Christian König
<deathsimple@vodafone.de> wrote:
> Am 29.07.2014 um 11:47 schrieb Michel Dänzer:
>
>> From: Michel Dänzer <michel.daenzer@amd.com>
>>
>> PCI GART doesn't support unsnooped access. AGP GART already uses
>> write-combined CPU mappings.
>>
>> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
>
>
> For this series Reviewed-by: Christian König <christian.koenig@amd.com>

Applied to my 3.17 tree.

Thanks.

>
>
>> ---
>>   drivers/gpu/drm/radeon/radeon_ring.c | 4 +++-
>>   1 file changed, 3 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/radeon/radeon_ring.c
>> b/drivers/gpu/drm/radeon/radeon_ring.c
>> index 71439f0..7cfea7e 100644
>> --- a/drivers/gpu/drm/radeon/radeon_ring.c
>> +++ b/drivers/gpu/drm/radeon/radeon_ring.c
>> @@ -640,7 +640,9 @@ int radeon_ring_init(struct radeon_device *rdev,
>> struct radeon_ring *ring, unsig
>>         /* Allocate ring buffer */
>>         if (ring->ring_obj == NULL) {
>>                 r = radeon_bo_create(rdev, ring->ring_size, PAGE_SIZE,
>> true,
>> -                                    RADEON_GEM_DOMAIN_GTT, 0,
>> +                                    RADEON_GEM_DOMAIN_GTT,
>> +                                    (rdev->flags & RADEON_IS_PCIE) ?
>> +                                    RADEON_GEM_GTT_WC : 0,
>>                                      NULL, &ring->ring_obj);
>>                 if (r) {
>>                         dev_err(rdev->dev, "(%d) ring create failed\n",
>> r);
>
>
> _______________________________________________
> dri-devel mailing list
> dri-devel@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/dri-devel
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^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2014-07-29 13:14 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2014-07-29  9:47 [PATCH 1/3] drm/radeon: Use write-combined CPU mappings of ring buffers with PCIe Michel Dänzer
2014-07-29  9:47 ` [PATCH 2/3] drm/radeon: Use write-combined CPU mappings of IBs on >= CIK Michel Dänzer
2014-07-29  9:47 ` [PATCH 3/3] drm/radeon/cik: Read back SDMA WPTR register after writing it Michel Dänzer
2014-07-29  9:54 ` [PATCH 1/3] drm/radeon: Use write-combined CPU mappings of ring buffers with PCIe Christian König
2014-07-29 13:14   ` Alex Deucher

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