From: "Michel Dänzer" <michel@daenzer.net>
To: "Marek Olšák" <maraeo@gmail.com>
Cc: dri-devel <dri-devel@lists.freedesktop.org>
Subject: Re: [PATCH] drm/radeon: Only flush HDP cache from idle ioctl if BO is in VRAM
Date: Tue, 05 Aug 2014 17:55:34 +0900 [thread overview]
Message-ID: <53E09C06.2090304@daenzer.net> (raw)
In-Reply-To: <CAAxE2A69dorJ8eXcZeu0iqJYXD2fP76oTYrivVcHtx8WoiKqMA@mail.gmail.com>
On 05.08.2014 07:01, Marek Olšák wrote:
> I'm afraid this won't always work and it can be a source of bugs.
>
> Userspace doesn't have to call GEM_WAIT_IDLE before a CPU access to a
> VRAM buffer. For example, consider a wait-idle request with a non-zero
> timeout, which is implemented as a loop which calls GEM_BUSY. Also,
> userspace can use fences (alright they are backed by 1-page-sized VRAM
> buffers at the moment) and it may use real fences in the future which
> are not tied to a buffer object.
>
> If the HDP flush isn't allowed in userspace IBs, I think we will have
> to expose it as an ioctl and call it explicitly from userspace.
I understand your concerns, but my patch doesn't change anything wrt
them, does it?
--
Earthling Michel Dänzer | http://www.amd.com
Libre software enthusiast | Mesa and X developer
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next prev parent reply other threads:[~2014-08-05 8:55 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-08-01 8:22 [PATCH] drm/radeon: Only flush HDP cache from idle ioctl if BO is in VRAM Michel Dänzer
2014-08-01 8:48 ` Christian König
2014-08-01 13:26 ` Alex Deucher
2014-08-04 22:01 ` Marek Olšák
2014-08-05 8:55 ` Michel Dänzer [this message]
2014-08-05 10:22 ` Marek Olšák
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