From: Boris Ostrovsky <boris.ostrovsky@oracle.com>
To: Jan Beulich <JBeulich@suse.com>
Cc: kevin.tian@intel.com, keir@xen.org,
suravee.suthikulpanit@amd.com, andrew.cooper3@citrix.com,
tim@xen.org, xen-devel@lists.xen.org, jun.nakajima@intel.com
Subject: Re: [PATCH v9 13/20] x86/VPMU: When handling MSR accesses, leave fault injection to callers
Date: Tue, 12 Aug 2014 12:30:10 -0400 [thread overview]
Message-ID: <53EA4112.2080609@oracle.com> (raw)
In-Reply-To: <53EA5656020000780002BC1C@mail.emea.novell.com>
On 08/12/2014 12:00 PM, Jan Beulich wrote:
>>>> On 12.08.14 at 17:47, <boris.ostrovsky@oracle.com> wrote:
>> On 08/12/2014 08:45 AM, Jan Beulich wrote:
>>>>>> On 08.08.14 at 18:55, <boris.ostrovsky@oracle.com> wrote:
>>>> @@ -476,18 +476,17 @@ static int core2_vpmu_do_wrmsr(unsigned int msr, uint64_t msr_content)
>>>> {
>>>> case MSR_CORE_PERF_GLOBAL_OVF_CTRL:
>>>> core2_vpmu_cxt->global_status &= ~msr_content;
>>>> - return 1;
>>>> + return 0;
>>>> case MSR_CORE_PERF_GLOBAL_STATUS:
>>>> gdprintk(XENLOG_INFO, "Can not write readonly MSR: "
>>>> "MSR_PERF_GLOBAL_STATUS(0x38E)!\n");
>>>> - hvm_inject_hw_exception(TRAP_gp_fault, 0);
>>>> return 1;
>>> Suspicious: Most return values get flipped, but this one (and at least
>>> one more below) doesn't. Any such inconsistencies that are being
>>> corrected (assuming this is intentional) as you go should be spelled
>>> out in the description. And then the question of course is whether
>>> it's really necessary to flip the meaning of this and some similar SVM
>>> function's return values anyway.
>> The return value of 1 of vpmu_do_msr() will now indicate that the
>> routine encountered a fault as opposed to indicating whether the MSR
>> access was to a VPMU register.
> And how would it now indicate that latter fact?
It won't. Which is why I made changes to vmx_msr_read/write_intercept()
to only call this routine when we know that a VPMU register is possibly
accessed.
I thought about tri-stating vpmu_do_msr() returns (-1 for faults, 0 for
no registers have been accessed, 1 for successful accesses) but decided
against it.
-boris
next prev parent reply other threads:[~2014-08-12 16:30 UTC|newest]
Thread overview: 49+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-08-08 16:55 [PATCH v9 00/20] x86/PMU: Xen PMU PV(H) support Boris Ostrovsky
2014-08-08 16:55 ` [PATCH v9 01/20] common/symbols: Export hypervisor symbols to privileged guest Boris Ostrovsky
2014-08-08 16:55 ` [PATCH v9 02/20] x86/VPMU: Manage VPMU_CONTEXT_SAVE flag in vpmu_save_force() Boris Ostrovsky
2014-08-11 13:28 ` Jan Beulich
2014-08-11 15:35 ` Boris Ostrovsky
2014-08-08 16:55 ` [PATCH v9 03/20] x86/VPMU: Set MSR bitmaps only for HVM/PVH guests Boris Ostrovsky
2014-08-08 16:55 ` [PATCH v9 04/20] x86/VPMU: Make vpmu macros a bit more efficient Boris Ostrovsky
2014-08-08 16:55 ` [PATCH v9 05/20] intel/VPMU: Clean up Intel VPMU code Boris Ostrovsky
2014-08-11 13:45 ` Jan Beulich
2014-08-11 16:01 ` Boris Ostrovsky
2014-08-11 16:13 ` Jan Beulich
2014-08-08 16:55 ` [PATCH v9 06/20] vmx: Merge MSR management routines Boris Ostrovsky
2014-08-08 16:55 ` [PATCH v9 07/20] x86/VPMU: Handle APIC_LVTPC accesses Boris Ostrovsky
2014-08-11 13:49 ` Jan Beulich
2014-08-08 16:55 ` [PATCH v9 08/20] intel/VPMU: MSR_CORE_PERF_GLOBAL_CTRL should be initialized to zero Boris Ostrovsky
2014-08-08 16:55 ` [PATCH v9 09/20] x86/VPMU: Add public xenpmu.h Boris Ostrovsky
2014-08-11 14:08 ` Jan Beulich
2014-08-11 16:15 ` Boris Ostrovsky
2014-08-18 16:02 ` Boris Ostrovsky
2014-08-18 20:23 ` Jan Beulich
2014-08-08 16:55 ` [PATCH v9 10/20] x86/VPMU: Make vpmu not HVM-specific Boris Ostrovsky
2014-08-08 16:55 ` [PATCH v9 11/20] x86/VPMU: Interface for setting PMU mode and flags Boris Ostrovsky
2014-08-12 10:37 ` Jan Beulich
2014-08-12 15:12 ` Boris Ostrovsky
2014-08-12 15:35 ` Jan Beulich
2014-08-12 16:25 ` Boris Ostrovsky
2014-08-14 16:32 ` Jan Beulich
2014-08-08 16:55 ` [PATCH v9 12/20] x86/VPMU: Initialize PMU for PV(H) guests Boris Ostrovsky
2014-08-12 11:59 ` Jan Beulich
2014-08-08 16:55 ` [PATCH v9 13/20] x86/VPMU: When handling MSR accesses, leave fault injection to callers Boris Ostrovsky
2014-08-12 12:45 ` Jan Beulich
2014-08-12 15:47 ` Boris Ostrovsky
2014-08-12 16:00 ` Jan Beulich
2014-08-12 16:30 ` Boris Ostrovsky [this message]
2014-08-08 16:55 ` [PATCH v9 14/20] x86/VPMU: Add support for PMU register handling on PV guests Boris Ostrovsky
2014-08-12 12:55 ` Jan Beulich
2014-08-08 16:55 ` [PATCH v9 15/20] x86/VPMU: Handle PMU interrupts for " Boris Ostrovsky
2014-08-12 12:58 ` Jan Beulich
2014-08-08 16:55 ` [PATCH v9 16/20] x86/VPMU: Merge vpmu_rdmsr and vpmu_wrmsr Boris Ostrovsky
2014-08-08 16:55 ` [PATCH v9 17/20] x86/VPMU: Add privileged PMU mode Boris Ostrovsky
2014-08-12 13:06 ` Jan Beulich
2014-08-12 16:14 ` Boris Ostrovsky
2014-08-08 16:55 ` [PATCH v9 18/20] x86/VPMU: Save VPMU state for PV guests during context switch Boris Ostrovsky
2014-08-12 14:15 ` Jan Beulich
2014-08-08 16:55 ` [PATCH v9 19/20] x86/VPMU: NMI-based VPMU support Boris Ostrovsky
2014-08-12 14:24 ` Jan Beulich
2014-08-08 16:55 ` [PATCH v9 20/20] x86/VPMU: Move VPMU files up from hvm/ directory Boris Ostrovsky
2014-08-12 14:26 ` Jan Beulich
2014-08-11 13:32 ` [PATCH v9 00/20] x86/PMU: Xen PMU PV(H) support Jan Beulich
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