From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Borkmann Subject: Re: [PATCH RFC v4 net-next 01/26] net: filter: add "load 64-bit immediate" eBPF instruction Date: Wed, 13 Aug 2014 19:39:56 +0200 Message-ID: <53EBA2EC.3030306@redhat.com> References: <1407916658-8731-1-git-send-email-ast@plumgrid.com> <1407916658-8731-2-git-send-email-ast@plumgrid.com> <53EB2D31.8090204@redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: Sender: linux-api-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Alexei Starovoitov Cc: "David S. Miller" , Ingo Molnar , Linus Torvalds , Andy Lutomirski , Steven Rostedt , Chema Gonzalez , Eric Dumazet , Peter Zijlstra , "H. Peter Anvin" , Andrew Morton , Kees Cook , Linux API , Network Development , LKML List-Id: linux-api@vger.kernel.org On 08/13/2014 07:34 PM, Alexei Starovoitov wrote: > On Wed, Aug 13, 2014 at 2:17 AM, Daniel Borkmann wrote: >> On 08/13/2014 09:57 AM, Alexei Starovoitov wrote: >>> >>> add BPF_LD_IMM64 instruction to load 64-bit immediate value into register. >>> All previous instructions were 8-byte. This is first 16-byte instruction. >>> Two consecutive 'struct bpf_insn' blocks are interpreted as single >>> instruction: >>> insn[0/1].code = BPF_LD | BPF_DW | BPF_IMM >>> insn[0/1].dst_reg = destination register >>> insn[0].imm = lower 32-bit >>> insn[1].imm = upper 32-bit >>> >>> Classic BPF has similar instruction: BPF_LD | BPF_W | BPF_IMM >>> which loads 32-bit immediate value into a register. >>> >>> x64 JITs it as single 'movabsq %rax, imm64' >>> arm64 may JIT as sequence of four 'movk x0, #imm16, lsl #shift' insn >>> >>> Note that old eBPF programs are binary compatible with new interpreter. >>> >>> Signed-off-by: Alexei Starovoitov >> >> >> For follow-ups on this series, can you put the actual motivation >> for this change from the cover letter into this commit log as it >> otherwise doesn't say anything clearly why it is needed. Code and >> test case looks good to me. > > ok. As you saw the full explanation is long, so I opted for 'it_does_this' > commit log. In the next rev will add more reasons to this log. Sure. Great, thanks. From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753813AbaHMRk0 (ORCPT ); Wed, 13 Aug 2014 13:40:26 -0400 Received: from mx1.redhat.com ([209.132.183.28]:54735 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753372AbaHMRkY (ORCPT ); Wed, 13 Aug 2014 13:40:24 -0400 Message-ID: <53EBA2EC.3030306@redhat.com> Date: Wed, 13 Aug 2014 19:39:56 +0200 From: Daniel Borkmann User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:17.0) Gecko/17.0 Thunderbird/17.0 MIME-Version: 1.0 To: Alexei Starovoitov CC: "David S. Miller" , Ingo Molnar , Linus Torvalds , Andy Lutomirski , Steven Rostedt , Chema Gonzalez , Eric Dumazet , Peter Zijlstra , "H. Peter Anvin" , Andrew Morton , Kees Cook , Linux API , Network Development , LKML Subject: Re: [PATCH RFC v4 net-next 01/26] net: filter: add "load 64-bit immediate" eBPF instruction References: <1407916658-8731-1-git-send-email-ast@plumgrid.com> <1407916658-8731-2-git-send-email-ast@plumgrid.com> <53EB2D31.8090204@redhat.com> In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 08/13/2014 07:34 PM, Alexei Starovoitov wrote: > On Wed, Aug 13, 2014 at 2:17 AM, Daniel Borkmann wrote: >> On 08/13/2014 09:57 AM, Alexei Starovoitov wrote: >>> >>> add BPF_LD_IMM64 instruction to load 64-bit immediate value into register. >>> All previous instructions were 8-byte. This is first 16-byte instruction. >>> Two consecutive 'struct bpf_insn' blocks are interpreted as single >>> instruction: >>> insn[0/1].code = BPF_LD | BPF_DW | BPF_IMM >>> insn[0/1].dst_reg = destination register >>> insn[0].imm = lower 32-bit >>> insn[1].imm = upper 32-bit >>> >>> Classic BPF has similar instruction: BPF_LD | BPF_W | BPF_IMM >>> which loads 32-bit immediate value into a register. >>> >>> x64 JITs it as single 'movabsq %rax, imm64' >>> arm64 may JIT as sequence of four 'movk x0, #imm16, lsl #shift' insn >>> >>> Note that old eBPF programs are binary compatible with new interpreter. >>> >>> Signed-off-by: Alexei Starovoitov >> >> >> For follow-ups on this series, can you put the actual motivation >> for this change from the cover letter into this commit log as it >> otherwise doesn't say anything clearly why it is needed. Code and >> test case looks good to me. > > ok. As you saw the full explanation is long, so I opted for 'it_does_this' > commit log. In the next rev will add more reasons to this log. Sure. Great, thanks.