From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andrzej Hajda Subject: Re: [PATCH] drm/exynos: dsi: fix exynos_dsi_set_pll() wrong return value Date: Thu, 14 Aug 2014 09:21:14 +0200 Message-ID: <53EC636A.9020402@samsung.com> References: <1407982956-18923-1-git-send-email-yj44.cho@samsung.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-reply-to: <1407982956-18923-1-git-send-email-yj44.cho@samsung.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: YoungJun Cho , airlied@linux.ie, dri-devel@lists.freedesktop.org Cc: kgene.kim@samsung.com, sw0312.kim@samsung.com, kyungmin.park@samsung.com, linux-samsung-soc@vger.kernel.org List-Id: linux-samsung-soc@vger.kernel.org Hi YoungJun, Thanks for spotting it. On 08/14/2014 04:22 AM, YoungJun Cho wrote: > The type of this function is unsigned long, and it is expected > to return proper fout value or zero if something is wrong. > So this patch fixes wrong return value for error cases. > > Signed-off-by: YoungJun Cho > Acked-by: Inki Dae > Acked-by: Kyungmin Park Acked-by: Andrzej Hajda Regards Andrzej > --- > drivers/gpu/drm/exynos/exynos_drm_dsi.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c b/drivers/gpu/drm/exynos/exynos_drm_dsi.c > index 86aebd8..061017b 100644 > --- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c > +++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c > @@ -421,7 +421,7 @@ static unsigned long exynos_dsi_set_pll(struct exynos_dsi *dsi, > if (!fout) { > dev_err(dsi->dev, > "failed to find PLL PMS for requested frequency\n"); > - return -EFAULT; > + return 0; > } > dev_dbg(dsi->dev, "PLL freq %lu, (p %d, m %d, s %d)\n", fout, p, m, s); > > @@ -453,7 +453,7 @@ static unsigned long exynos_dsi_set_pll(struct exynos_dsi *dsi, > do { > if (timeout-- == 0) { > dev_err(dsi->dev, "PLL failed to stabilize\n"); > - return -EFAULT; > + return 0; > } > reg = readl(dsi->reg_base + DSIM_STATUS_REG); > } while ((reg & DSIM_PLL_STABLE) == 0);