From: Paolo Bonzini <pbonzini@redhat.com>
To: Wanpeng Li <wanpeng.li@linux.intel.com>
Cc: Jan Kiszka <jan.kiszka@siemens.com>,
Marcelo Tosatti <mtosatti@redhat.com>,
Gleb Natapov <gleb@kernel.org>, Bandan Das <bsd@redhat.com>,
Zhang Yang <yang.z.zhang@intel.com>,
kvm@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v4] KVM: nVMX: nested TPR shadow/threshold emulation
Date: Tue, 19 Aug 2014 10:34:20 +0200 [thread overview]
Message-ID: <53F30C0C.9040601@redhat.com> (raw)
In-Reply-To: <1408437040-49181-1-git-send-email-wanpeng.li@linux.intel.com>
Il 19/08/2014 10:30, Wanpeng Li ha scritto:
> + if (vmx->nested.virtual_apic_page)
> + nested_release_page(vmx->nested.virtual_apic_page);
> + vmx->nested.virtual_apic_page =
> + nested_get_page(vcpu, vmcs12->virtual_apic_page_addr);
> + if (!vmx->nested.virtual_apic_page)
> + exec_control &=
> + ~CPU_BASED_TPR_SHADOW;
> + else
> + vmcs_write64(VIRTUAL_APIC_PAGE_ADDR,
> + page_to_phys(vmx->nested.virtual_apic_page));
> +
> + /*
> + * If CR8 load exits are enabled, CR8 store exits are enabled,
> + * and virtualize APIC access is disabled, the processor would
> + * never notice. Doing it unconditionally is not correct, but
> + * it is the simplest thing.
> + */
> + if (!(exec_control & CPU_BASED_TPR_SHADOW) &&
> + !((exec_control & CPU_BASED_CR8_LOAD_EXITING) &&
> + (exec_control & CPU_BASED_CR8_STORE_EXITING)))
> + nested_vmx_failValid(vcpu, VMXERR_ENTRY_INVALID_CONTROL_FIELD);
> +
You aren't checking "virtualize APIC access" here, but the comment
mentions it.
As the comment says, failing the entry unconditionally could be the
simplest thing, which means moving the nested_vmx_failValid call inside
the "if (!vmx->nested.virtual_apic_page)".
If you want to check all of CR8_LOAD/CR8_STORE/VIRTUALIZE_APIC_ACCESS,
please mention in the comment that failing the vm entry is _not_ what
the processor does but it's basically the only possibility we have. In
that case, I would also place the "if" within the "if
(!vmx->nested.virtual_apic_page)": it also simplifies the condition
because you don't have to check CPU_BASED_TPR_SHADOW anymore.
You can send v5 with these changes, and I'll apply it for 3.18. Thanks!
Paolo
next prev parent reply other threads:[~2014-08-19 8:34 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-08-19 8:30 [PATCH v4] KVM: nVMX: nested TPR shadow/threshold emulation Wanpeng Li
2014-08-19 8:34 ` Paolo Bonzini [this message]
2014-08-20 6:59 ` Wanpeng Li
2014-08-20 7:42 ` Paolo Bonzini
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