From: Allen Pais <allen.pais@oracle.com>
To: sparclinux@vger.kernel.org
Subject: Re: [PATCH 1/3] sparc64: correctly recognise M7 cpu type
Date: Thu, 21 Aug 2014 13:52:37 +0000 [thread overview]
Message-ID: <53F5F993.4010506@oracle.com> (raw)
In-Reply-To: <1408424013-20390-1-git-send-email-allen.pais@oracle.com>
Sam, Richard,
>>>>> @@ -414,6 +414,7 @@ sun4v_chip_type:
>>>>> cmp %g2, 'T'
>>>>> be,pt %xcc, 70f
>>>>> cmp %g2, 'M'
>>>>> + be,pt %xcc, 71f
>>>>> bne,pn %xcc, 49f
>>>> Looks like you are missing a nop in the delay slot?
>>>
>>> I don't think so. I have tested the patch on M7 and I have had no issues with it.
>> Even if it works as expected then it is confusing.
>> I read the code like this:
>>
>> if xcc equals pt then jump to 71 but if pn is not equal to xcc then jump to 49
>>
>> Maybe the second opcode is ignored because it is a conditional jump or maybe
>> they are always equal.
> The two branches are the logical opposite of each other so only one is ever taken and that is why the code "works".
I'll go ahead and add the delay slot for better readability. It'll look something like this,
cmp %g2, 'T'
be,pt %xcc, 70f
cmp %g2, 'M'
+ be,pt %xcc, 71f
+ nop
bne,pn %xcc, 49f
nop
- ALlen
next prev parent reply other threads:[~2014-08-21 13:52 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-08-19 4:53 [PATCH 1/3] sparc64: correctly recognise M7 cpu type Allen Pais
2014-08-19 15:21 ` Sam Ravnborg
2014-08-21 10:15 ` Allen Pais
2014-08-21 12:14 ` Sam Ravnborg
2014-08-21 12:29 ` Richard Mortimer
2014-08-21 13:52 ` Allen Pais [this message]
2014-08-22 5:09 ` David Miller
2014-08-22 5:10 ` David Miller
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