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From: Allen Pais <allen.pais@oracle.com>
To: sparclinux@vger.kernel.org
Subject: Re: [PATCH v1 1/3] sparc64: correctly recognise M7 cpu type
Date: Sun, 24 Aug 2014 06:19:09 +0000	[thread overview]
Message-ID: <53F9810D.3070808@oracle.com> (raw)
In-Reply-To: <1408686773-3044-1-git-send-email-allen.pais@oracle.com>

> 
> I don't think this is correct.
> 
>> @@ -414,6 +414,8 @@ sun4v_chip_type:
>>  	cmp	%g2, 'T'
>>  	be,pt	%xcc, 70f
>>  	 cmp	%g2, 'M'
>> +	be,pt	%xcc, 71f
>> +	 nop
>>  	bne,pn	%xcc, 49f
>>  	 nop
> 
> This code block is supposed to fallthrough when %g2 is 'M' so that
> we accept all of "{T,M}345..." but your change is breaking that
> such that we will now only accept "M" as a prefix for "7".
> 
> That's a regression.
> 
> All you have to do is add the new comparison against '7' in the
> "70:" label code block, and you're done.

 The idea was to also have M5 and M6-32 cpu types supported too with M7. 

+71:
+	ldub	[%g1 + 7], %g2
+	cmp	%g1, '5'
+	be,pt	%xcc, 5f
+	 mov	SUN4V_CHIP_SPARC_M5, %g4
+	cmp	%g1, '6'
+	be,pt	%xcc, 5f
+	 mov	SUN4V_CHIP_SPARC_M6, %g4
+       cmp     %g2, '7'
+       be,pt   %xcc, 5f
+        mov    SUN4V_CHIP_SPARC_M7, %g4
+       ba,pt   %xcc, 49f
+        nop
+

 I haven't tested it yet on M5, I should have perhaps sent all them together. 
lemme know what you think.

- Allen
 


  parent reply	other threads:[~2014-08-24  6:19 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-08-22  5:53 [PATCH v1 1/3] sparc64: correctly recognise M7 cpu type Allen Pais
2014-08-23 18:51 ` David Miller
2014-08-24  6:18 ` David Miller
2014-08-24  6:19 ` Allen Pais [this message]
2014-08-24  6:31 ` Allen Pais
2014-08-24  6:43 ` David Miller
2014-08-24  6:43 ` Allen Pais
2014-08-24 12:35 ` Bob Picco
2014-08-24 19:06 ` David Miller

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