From: "Christian König" <deathsimple@vodafone.de>
To: Alex Deucher <alexdeucher@gmail.com>, dri-devel@lists.freedesktop.org
Cc: Alex Deucher <alexander.deucher@amd.com>
Subject: Re: [PATCH] drm/radeon: soft reset uvd on RV770 uvd init
Date: Wed, 27 Aug 2014 10:10:44 +0200 [thread overview]
Message-ID: <53FD9284.7020603@vodafone.de> (raw)
In-Reply-To: <1409108650-2130-1-git-send-email-alexander.deucher@amd.com>
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Am 27.08.2014 um 05:04 schrieb Alex Deucher:
> Fixes avoids and error message on boot which is harmless,
> but confusing to users.
>
> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
The attached patch fixes the underlying issue for me on RS780.
Does it also work on RV770? If yes than it's probably the better approach.
Christian.
> ---
> drivers/gpu/drm/radeon/uvd_v1_0.c | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/drivers/gpu/drm/radeon/uvd_v1_0.c b/drivers/gpu/drm/radeon/uvd_v1_0.c
> index e251624..82e4fa6 100644
> --- a/drivers/gpu/drm/radeon/uvd_v1_0.c
> +++ b/drivers/gpu/drm/radeon/uvd_v1_0.c
> @@ -325,6 +325,13 @@ int uvd_v1_0_start(struct radeon_device *rdev)
>
> WREG32_P(UVD_RB_ARB_CTRL, 0, ~(1 << 3));
>
> + if (rdev->family == CHIP_RV770) {
> + WREG32_P(UVD_SOFT_RESET, VCPU_SOFT_RESET, ~VCPU_SOFT_RESET);
> + mdelay(10);
> + WREG32_P(UVD_SOFT_RESET, 0, ~VCPU_SOFT_RESET);
> + mdelay(10);
> + }
> +
> for (i = 0; i < 10; ++i) {
> uint32_t status;
> for (j = 0; j < 100; ++j) {
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>From 499b07135129211d633820cb57bc39cf14bda86b Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Christian=20K=C3=B6nig?= <christian.koenig@amd.com>
Date: Wed, 27 Aug 2014 09:59:45 +0200
Subject: [PATCH] drm/radeon: enable RB_ARB before resetting the VCPU
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
This fixes "UVD not responding, trying to reset the VCPU"
messages on earlier ASICs.
Signed-off-by: Christian König <christian.koenig@amd.com>
---
drivers/gpu/drm/radeon/uvd_v1_0.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/radeon/uvd_v1_0.c b/drivers/gpu/drm/radeon/uvd_v1_0.c
index e251624..339817a 100644
--- a/drivers/gpu/drm/radeon/uvd_v1_0.c
+++ b/drivers/gpu/drm/radeon/uvd_v1_0.c
@@ -319,12 +319,12 @@ int uvd_v1_0_start(struct radeon_device *rdev)
/* enable UMC */
WREG32_P(UVD_LMI_CTRL2, 0, ~(1 << 8));
+ WREG32_P(UVD_RB_ARB_CTRL, 0, ~(1 << 3));
+
/* boot up the VCPU */
WREG32(UVD_SOFT_RESET, 0);
mdelay(10);
- WREG32_P(UVD_RB_ARB_CTRL, 0, ~(1 << 3));
-
for (i = 0; i < 10; ++i) {
uint32_t status;
for (j = 0; j < 100; ++j) {
--
1.9.1
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next prev parent reply other threads:[~2014-08-27 8:11 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-08-27 3:04 [PATCH] drm/radeon: soft reset uvd on RV770 uvd init Alex Deucher
2014-08-27 8:10 ` Christian König [this message]
2014-08-27 15:12 ` Alex Deucher
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