Re: [PATCH v2] KVM: x86: sync old tmr with ioapic to update

["Chen, Tiejun" <tiejun.chen@intel.com>]

On 2014/8/27 22:05, Wei Wang wrote:
> kvm_ioapic_scan_entry() needs to update tmr. The previous lapic tmr value
> (old_tmr) needs to sync with ioapic to get an accurate updated tmr
> value before the updating work.
>
> Tested-by: Rongrong Liu <rongrongx.liu@intel.com>
> Signed-off-by: Yang Zhang <yang.z.zhang@intel.com>
> Signed-off-by: Wei Wang <wei.w.wang@intel.com>
> ---
>   arch/x86/kvm/lapic.c |   19 +++++++++++++++++--
>   arch/x86/kvm/x86.c   |    2 +-
>   2 files changed, 18 insertions(+), 3 deletions(-)
>
> diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
> index 08e8a89..8c1162d 100644
> --- a/arch/x86/kvm/lapic.c
> +++ b/arch/x86/kvm/lapic.c
> @@ -518,10 +518,25 @@ static void pv_eoi_clr_pending(struct kvm_vcpu *vcpu)
>   void kvm_apic_update_tmr(struct kvm_vcpu *vcpu, u32 *tmr)
>   {
>   	struct kvm_lapic *apic = vcpu->arch.apic;
> +	u32 irr;
> +	u32 isr;
> +	u32 old_tmr, new_tmr;
>   	int i;
>
> -	for (i = 0; i < 8; i++)
> -		apic_set_reg(apic, APIC_TMR + 0x10 * i, tmr[i]);
> +	/*
> +	 * The updated tmr value comes from level-triggerd interrupts that

s/level-triggerd/level-triggered

> +	 * have already been delieverd to lapic and new coming ones which

s/delieverd/delivered

> +	 * are pending in ioapic. According to the x86 spec, tmr is valid
> +	 * when irr or isr is set.
> +	 */
> +	for (i = 0; i < 8; i++) {
> +		irr = kvm_apic_get_reg(apic, APIC_IRR + 0x10 * i);
> +		isr = kvm_apic_get_reg(apic, APIC_ISR + 0x10 * i);
> +		old_tmr = kvm_apic_get_reg(apic, APIC_TMR + 0x10 * i);
> +		new_tmr = (~(irr | isr) & tmr[i])
> +				| ((irr | isr) & old_tmr);
> +		apic_set_reg(apic, APIC_TMR + 0x10 * i, new_tmr);
> +	}
>   }
>
>   static void apic_update_ppr(struct kvm_lapic *apic)
> diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
> index 5f5edb6..d401684 100644
> --- a/arch/x86/kvm/x86.c
> +++ b/arch/x86/kvm/x86.c
> @@ -5991,8 +5991,8 @@ static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
>   	memset(tmr, 0, 32);
>
>   	kvm_ioapic_scan_entry(vcpu, eoi_exit_bitmap, tmr);
> -	kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
>   	kvm_apic_update_tmr(vcpu, tmr);
> +	kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
>   }
>
>   /*
>