diff for duplicates of <53FEF046.4030804@amd.com> diff --git a/a/1.txt b/N1/1.txt index 43ce37f..6b9359c 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,7 +1,7 @@ On 08/14/2014 12:55 PM, Mark Rutland wrote: -> On Wed, Aug 13, 2014 at 04:00:40PM +0100, suravee.suthikulpanit@amd.com wrote: +> On Wed, Aug 13, 2014 at 04:00:40PM +0100, suravee.suthikulpanit at amd.com wrote: >> From: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> >> >> ARM GICv2m specification extends GICv2 to support MSI(-X) with @@ -52,7 +52,7 @@ On 08/14/2014 12:55 PM, Mark Rutland wrote: >> + >> +Example: >> + ->> + interrupt-controller@e1101000 { +>> + interrupt-controller at e1101000 { >> + compatible = "arm,gic-400"; >> + #interrupt-cells = <3>; >> + #address-cells = <2>; diff --git a/a/content_digest b/N1/content_digest index 17f6eaf..b05d4d9 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,28 +1,16 @@ "ref\01407942041-3291-1-git-send-email-suravee.suthikulpanit@amd.com\0" "ref\01407942041-3291-2-git-send-email-suravee.suthikulpanit@amd.com\0" "ref\020140814175525.GI24018@leverpostej\0" - "From\0Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>\0" - "Subject\0Re: [PATCH 1/2 V4] irqchip: gic: Add supports for ARM GICv2m MSI(-X)\0" + "From\0suravee.suthikulpanit@amd.com (Suravee Suthikulpanit)\0" + "Subject\0[PATCH 1/2 V4] irqchip: gic: Add supports for ARM GICv2m MSI(-X)\0" "Date\0Thu, 28 Aug 2014 04:03:02 -0500\0" - "To\0Mark Rutland <mark.rutland@arm.com>\0" - "Cc\0Marc Zyngier <Marc.Zyngier@arm.com>" - jason@lakedaemon.net <jason@lakedaemon.net> - Pawel Moll <Pawel.Moll@arm.com> - Catalin Marinas <Catalin.Marinas@arm.com> - Will Deacon <Will.Deacon@arm.com> - tglx@linutronix.de <tglx@linutronix.de> - Harish.Kasiviswanathan@amd.com <Harish.Kasiviswanathan@amd.com> - linux-arm-kernel@lists.infradead.org <linux-arm-kernel@lists.infradead.org> - linux-pci@vger.kernel.org <linux-pci@vger.kernel.org> - linux-kernel@vger.kernel.org <linux-kernel@vger.kernel.org> - linux-doc@vger.kernel.org <linux-doc@vger.kernel.org> - " devicetree@vger.kernel.org <devicetree@vger.kernel.org>\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "\n" "\n" "On 08/14/2014 12:55 PM, Mark Rutland wrote:\n" - "> On Wed, Aug 13, 2014 at 04:00:40PM +0100, suravee.suthikulpanit@amd.com wrote:\n" + "> On Wed, Aug 13, 2014 at 04:00:40PM +0100, suravee.suthikulpanit at amd.com wrote:\n" ">> From: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>\n" ">>\n" ">> ARM GICv2m specification extends GICv2 to support MSI(-X) with\n" @@ -73,7 +61,7 @@ ">> +\n" ">> +Example:\n" ">> +\n" - ">> + interrupt-controller@e1101000 {\n" + ">> + interrupt-controller at e1101000 {\n" ">> + compatible = \"arm,gic-400\";\n" ">> + #interrupt-cells = <3>;\n" ">> + #address-cells = <2>;\n" @@ -122,4 +110,4 @@ "\n" Suravee -034baa6230e07fa40baa5d21e0c79614a3348e8d24c85d39b009b53a35209698 +4968c06f706f535b1490a1ed1f6cea9c0740be45c694dd879bf5782c7defc272
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