From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.3 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_2 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 92869CA9EAE for ; Tue, 29 Oct 2019 22:13:33 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 6BE8A2054F for ; Tue, 29 Oct 2019 22:13:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725932AbfJ2WNc (ORCPT ); Tue, 29 Oct 2019 18:13:32 -0400 Received: from mga04.intel.com ([192.55.52.120]:27222 "EHLO mga04.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725840AbfJ2WNc (ORCPT ); Tue, 29 Oct 2019 18:13:32 -0400 X-Amp-Result: UNKNOWN X-Amp-Original-Verdict: FILE UNKNOWN X-Amp-File-Uploaded: False Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 29 Oct 2019 15:13:32 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.68,245,1569308400"; d="diff'?scan'208";a="198501923" Received: from spandruv-mobl3.jf.intel.com ([10.255.229.217]) by fmsmga008.fm.intel.com with ESMTP; 29 Oct 2019 15:13:31 -0700 Message-ID: <53fc01bf9ef25012a1a43b87954b62a02101d85c.camel@linux.intel.com> Subject: Re: "Force HWP min perf before offline" triggers unchecked MSR access errors From: Srinivas Pandruvada To: Qian Cai , "Rafael J. Wysocki" Cc: "Rafael J. Wysocki" , Chen Yu , Len Brown , Viresh Kumar , Borislav Petkov , Thomas Gleixner , Linux PM , Linux Kernel Mailing List Date: Tue, 29 Oct 2019 15:13:30 -0700 In-Reply-To: References: Content-Type: multipart/mixed; boundary="=-QOLy+FCNmsPb1Mw2UaNS" X-Mailer: Evolution 3.28.5 (3.28.5-3.fc28) Mime-Version: 1.0 Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org --=-QOLy+FCNmsPb1Mw2UaNS Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit On Tue, 2019-10-29 at 18:01 -0400, Qian Cai wrote: > > On Oct 29, 2019, at 5:47 PM, Rafael J. Wysocki > > wrote: > > > > The MSR_IA32_ENERGY_PERF_BIAS MSR appears to be not present, which > > should be caught by the X86_FEATURE_EPB check in > > intel_pstate_set_epb(). > > > > Do you run this in a guest perchance? > > No, it is a baremetal HPE server. The dmesg does say something like > energy perf bias changed from performance to normal, and the cpuflag > contains epb which I thought that would pass the feature check? I > could upload the whole dmesg a bit later if that helps. Try the attached change. You have a Skylake server with no EPP support. This is odd. Thanks, Srinivas --=-QOLy+FCNmsPb1Mw2UaNS Content-Disposition: attachment; filename="epb_power.diff" Content-Type: text/x-patch; name="epb_power.diff"; charset="UTF-8" Content-Transfer-Encoding: base64 ZGlmZiAtLWdpdCBhL2RyaXZlcnMvYWNwaS9wcm9jZXNzb3JfdGhlcm1hbC5jIGIvZHJpdmVycy9h Y3BpL3Byb2Nlc3Nvcl90aGVybWFsLmMKaW5kZXggZWMyNjM4ZjFkZjRmLi5mNzBmNzQ2ZWQ1OGQg MTAwNjQ0Ci0tLSBhL2RyaXZlcnMvYWNwaS9wcm9jZXNzb3JfdGhlcm1hbC5jCisrKyBiL2RyaXZl cnMvYWNwaS9wcm9jZXNzb3JfdGhlcm1hbC5jCkBAIC0xMzAsNiArMTMwLDcgQEAgdm9pZCBhY3Bp X3RoZXJtYWxfY3B1ZnJlcV9pbml0KGludCBjcHUpCiAJc3RydWN0IGFjcGlfcHJvY2Vzc29yICpw ciA9IHBlcl9jcHUocHJvY2Vzc29ycywgY3B1KTsKIAlpbnQgcmV0OwogCisJbWVtc2V0KCZwci0+ dGhlcm1hbF9yZXEsIDAsIHNpemVvZihwci0+dGhlcm1hbF9yZXEpKTsKIAlyZXQgPSBkZXZfcG1f cW9zX2FkZF9yZXF1ZXN0KGdldF9jcHVfZGV2aWNlKGNwdSksCiAJCQkJICAgICAmcHItPnRoZXJt YWxfcmVxLCBERVZfUE1fUU9TX01BWF9GUkVRVUVOQ1ksCiAJCQkJICAgICBJTlRfTUFYKTsKZGlm ZiAtLWdpdCBhL2RyaXZlcnMvY3B1ZnJlcS9pbnRlbF9wc3RhdGUuYyBiL2RyaXZlcnMvY3B1ZnJl cS9pbnRlbF9wc3RhdGUuYwppbmRleCA5ZjAyZGU5YTFiNDcuLmVhYjhiMDQ4ZGM5ZiAxMDA2NDQK LS0tIGEvZHJpdmVycy9jcHVmcmVxL2ludGVsX3BzdGF0ZS5jCisrKyBiL2RyaXZlcnMvY3B1ZnJl cS9pbnRlbF9wc3RhdGUuYwpAQCAtODUxLDcgKzg1MSw3IEBAIHN0YXRpYyB2b2lkIGludGVsX3Bz dGF0ZV9od3BfZm9yY2VfbWluX3BlcmYoaW50IGNwdSkKIAlpZiAoYm9vdF9jcHVfaGFzKFg4Nl9G RUFUVVJFX0hXUF9FUFApKQogCQl2YWx1ZSB8PSBIV1BfRU5FUkdZX1BFUkZfUFJFRkVSRU5DRShI V1BfRVBQX1BPV0VSU0FWRSk7CiAJZWxzZQotCQlpbnRlbF9wc3RhdGVfc2V0X2VwYihjcHUsIEhX UF9FUFBfQkFMQU5DRV9QT1dFUlNBVkUpOworCQlpbnRlbF9wc3RhdGVfc2V0X2VwYihjcHUsIDB4 MEYpOwogCiAJd3Jtc3JsX29uX2NwdShjcHUsIE1TUl9IV1BfUkVRVUVTVCwgdmFsdWUpOwogfQo= --=-QOLy+FCNmsPb1Mw2UaNS--