From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:56853) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XOOoG-000313-Ua for qemu-devel@nongnu.org; Mon, 01 Sep 2014 06:26:09 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XOOoA-0007TE-8V for qemu-devel@nongnu.org; Mon, 01 Sep 2014 06:26:04 -0400 Received: from cantor2.suse.de ([195.135.220.15]:56451 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XOOo9-0007Sn-VQ for qemu-devel@nongnu.org; Mon, 01 Sep 2014 06:25:58 -0400 Message-ID: <540449B1.9030705@suse.de> Date: Mon, 01 Sep 2014 12:25:53 +0200 From: =?UTF-8?B?QW5kcmVhcyBGw6RyYmVy?= MIME-Version: 1.0 References: <1409320338-63098-1-git-send-email-jfrei@linux.vnet.ibm.com> <1409320338-63098-6-git-send-email-jfrei@linux.vnet.ibm.com> In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH 5/5] gdb: provide the name of the architecture in the target.xml List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell , Jens Freimann Cc: David Hildenbrand , Alexander Graf , QEMU Developers , Christian Borntraeger , "Vassili Karpov (malc)" , Cornelia Huck Am 01.09.2014 12:19, schrieb Peter Maydell: > [ccing Andreas in case he wants to review the QOM aspects of this, > though they're fairly straightforward I think.] >=20 > On 29 August 2014 14:52, Jens Freimann wrote= : >> From: David Hildenbrand >> >> This patch provides the name of the architecture in the target.xml if = available. >> >> This allows the remote gdb to detect the target architecture on its ow= n - so >> there is no need to specify it manually (e.g. if gdb is started withou= t a >> binary) using "set arch *arch_name*". >=20 > This is neat; I didn't realise gdb let you do this. >=20 >> The name of the architecture has been added to all archs that provide = a >> target.xml (by supplying a gdb_core_xml_file) and have a unique archit= ecture >> name in gdb's feature xml files. >=20 > What about 32-bit ARM? You set the architecture name for AArch64 > but not the 32 bit case. >=20 > Are there architectures that might need to specify something > more complicated than "always the same string"? (ie is there > a case for having the target provide a "return architecture name" > method rather than a constant string?) >=20 >> Signed-off-by: David Hildenbrand >> Acked-by: Cornelia Huck >> Acked-by: Christian Borntraeger >> Signed-off-by: Jens Freimann >> Cc: Andrzej Zaborowski >> Cc: Peter Maydell >> Cc: Vassili Karpov (malc) >> --- >> gdbstub.c | 19 ++++++++++++------- >> include/qom/cpu.h | 2 ++ >> target-arm/cpu64.c | 1 + >> target-ppc/translate_init.c | 2 ++ >> target-s390x/cpu.c | 1 + >> 5 files changed, 18 insertions(+), 7 deletions(-) >> >> diff --git a/gdbstub.c b/gdbstub.c >> index 8afe0b7..af82259 100644 >> --- a/gdbstub.c >> +++ b/gdbstub.c >> @@ -523,13 +523,18 @@ static const char *get_feature_xml(const char *p= , const char **newp, >> GDBRegisterState *r; >> CPUState *cpu =3D first_cpu; >> >> - snprintf(target_xml, sizeof(target_xml), >> - "" >> - "" >> - "" >> - "", >> - cc->gdb_core_xml_file); >> - >> + pstrcat(target_xml, sizeof(target_xml), >> + "" >> + "" >> + ""); >> + if (cc->gdb_arch_name) { >> + pstrcat(target_xml, sizeof(target_xml), ""); >> + pstrcat(target_xml, sizeof(target_xml), cc->gdb_arch_= name); >> + pstrcat(target_xml, sizeof(target_xml), ""); >> + } >> + pstrcat(target_xml, sizeof(target_xml), "> + pstrcat(target_xml, sizeof(target_xml), cc->gdb_core_xml_= file); >> + pstrcat(target_xml, sizeof(target_xml), "\"/>"); >> for (r =3D cpu->gdb_regs; r; r =3D r->next) { >> pstrcat(target_xml, sizeof(target_xml), "> pstrcat(target_xml, sizeof(target_xml), r->xml); >> diff --git a/include/qom/cpu.h b/include/qom/cpu.h >> index 1aafbf5..8828b16 100644 >> --- a/include/qom/cpu.h >> +++ b/include/qom/cpu.h >> @@ -98,6 +98,7 @@ struct TranslationBlock; >> * @vmsd: State description for migration. >> * @gdb_num_core_regs: Number of core registers accessible to GDB. >> * @gdb_core_xml_file: File name for core registers GDB XML descripti= on. >> + * @gdb_arch_name: Architecture name known to GDB. >> * >> * Represents a CPU family or model. >> */ >> @@ -147,6 +148,7 @@ typedef struct CPUClass { >> const struct VMStateDescription *vmsd; >> int gdb_num_core_regs; >> const char *gdb_core_xml_file; >> + const char *gdb_arch_name; >> } CPUClass; >> >> #ifdef HOST_WORDS_BIGENDIAN >> diff --git a/target-arm/cpu64.c b/target-arm/cpu64.c >> index 38d2b84..9df7492 100644 >> --- a/target-arm/cpu64.c >> +++ b/target-arm/cpu64.c >> @@ -201,6 +201,7 @@ static void aarch64_cpu_class_init(ObjectClass *oc= , void *data) >> cc->gdb_write_register =3D aarch64_cpu_gdb_write_register; >> cc->gdb_num_core_regs =3D 34; >> cc->gdb_core_xml_file =3D "aarch64-core.xml"; >> + cc->gdb_arch_name =3D "aarch64"; >> } >> >> static void aarch64_cpu_register(const ARMCPUInfo *info) >> diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c >> index 48177ed..7165347 100644 >> --- a/target-ppc/translate_init.c >> +++ b/target-ppc/translate_init.c >> @@ -9649,8 +9649,10 @@ static void ppc_cpu_class_init(ObjectClass *oc,= void *data) >> >> #if defined(TARGET_PPC64) >> cc->gdb_core_xml_file =3D "power64-core.xml"; >> + cc->gdb_arch_name =3D "powerpc:common64"; >> #else >> cc->gdb_core_xml_file =3D "power-core.xml"; >> + cc->gdb_arch_name =3D "powerpc:common"; >> #endif >> #ifndef CONFIG_USER_ONLY >> cc->virtio_is_big_endian =3D ppc_cpu_is_big_endian; >> diff --git a/target-s390x/cpu.c b/target-s390x/cpu.c >> index 4b03e42..5dae93c 100644 >> --- a/target-s390x/cpu.c >> +++ b/target-s390x/cpu.c >> @@ -262,6 +262,7 @@ static void s390_cpu_class_init(ObjectClass *oc, v= oid *data) >> dc->vmsd =3D &vmstate_s390_cpu; >> cc->gdb_num_core_regs =3D S390_NUM_CORE_REGS; >> cc->gdb_core_xml_file =3D "s390x-core64.xml"; >> + cc->gdb_arch_name =3D "s390:64-bit"; >> } >> >> static const TypeInfo s390_cpu_type_info =3D { >> -- >> 1.8.5.5 Looks good to me and even got documented, Reviewed-by: Andreas F=C3=A4rber Thanks, Andreas --=20 SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 N=C3=BCrnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imend=C3=B6rffer; HRB 16746 AG N=C3=BC= rnberg