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diff for duplicates of <54067D28.20408@opensource.altera.com>

diff --git a/a/1.txt b/N1/1.txt
index 7fadc0c..de99272 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -6,7 +6,7 @@ Many thanks...
 
 Dinh
 
-On 8/11/14, 10:18 AM, tthayer at opensource.altera.com wrote:
+On 8/11/14, 10:18 AM, tthayer@opensource.altera.com wrote:
 > From: Thor Thayer <tthayer@opensource.altera.com>
 > 
 > Add the Altera SDRAM EDAC bindings and device tree changes to the Altera SoC project.
@@ -65,7 +65,7 @@ On 8/11/14, 10:18 AM, tthayer at opensource.altera.com wrote:
 >  			};
 >  		};
 >  
-> +		sdr: sdr at ffc25000 {
+> +		sdr: sdr@ffc25000 {
 > +			compatible = "syscon";
 > +			reg = <0xffc25000 0x1000>;
 > +		};
@@ -76,7 +76,7 @@ On 8/11/14, 10:18 AM, tthayer at opensource.altera.com wrote:
 > +			interrupts = <0 39 4>;
 > +		};
 > +
->  		L2: l2-cache at fffef000 {
+>  		L2: l2-cache@fffef000 {
 >  			compatible = "arm,pl310-cache";
 >  			reg = <0xfffef000 0x1000>;
 >
diff --git a/a/content_digest b/N1/content_digest
index 1004e01..5d4f240 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,9 +1,29 @@
  "ref\01407770293-27190-1-git-send-email-tthayer@opensource.altera.com\0"
  "ref\01407770293-27190-3-git-send-email-tthayer@opensource.altera.com\0"
- "From\0dinguyen@opensource.altera.com (Dinh Nguyen)\0"
- "Subject\0[PATCHv10 2/2] arm: dts: Add Altera SDRAM EDAC bindings & devicetree entries.\0"
+ "From\0Dinh Nguyen <dinguyen@opensource.altera.com>\0"
+ "Subject\0Re: [PATCHv10 2/2] arm: dts: Add Altera SDRAM EDAC bindings & devicetree entries.\0"
  "Date\0Tue, 2 Sep 2014 21:30:00 -0500\0"
- "To\0linux-arm-kernel@lists.infradead.org\0"
+ "To\0tthayer@opensource.altera.com"
+  robherring2@gmail.com
+  pawel.moll@arm.com
+  mark.rutland@arm.com
+  ijc+devicetree@hellion.org.uk
+  galak@codeaurora.org
+  rob@landley.net
+  linux@arm.linux.org.uk
+  atull@opensource.altera.com
+  delicious.quinoa@gmail.com
+  dougthompson@xmission.com
+  grant.likely@linaro.org
+  bp@alien8.de
+  sameo@linux.intel.com
+ " lee.jones@linaro.org\0"
+ "Cc\0devicetree@vger.kernel.org"
+  linux-doc@vger.kernel.org
+  linux-edac@vger.kernel.org
+  linux-kernel@vger.kernel.org
+  linux-arm-kernel@lists.infradead.org
+ " tthayer.linux@gmail.com\0"
  "\00:1\0"
  "b\0"
  "Hi DTS maintainers,\n"
@@ -14,7 +34,7 @@
  "\n"
  "Dinh\n"
  "\n"
- "On 8/11/14, 10:18 AM, tthayer at opensource.altera.com wrote:\n"
+ "On 8/11/14, 10:18 AM, tthayer@opensource.altera.com wrote:\n"
  "> From: Thor Thayer <tthayer@opensource.altera.com>\n"
  "> \n"
  "> Add the Altera SDRAM EDAC bindings and device tree changes to the Altera SoC project.\n"
@@ -73,7 +93,7 @@
  ">  \t\t\t};\n"
  ">  \t\t};\n"
  ">  \n"
- "> +\t\tsdr: sdr at ffc25000 {\n"
+ "> +\t\tsdr: sdr@ffc25000 {\n"
  "> +\t\t\tcompatible = \"syscon\";\n"
  "> +\t\t\treg = <0xffc25000 0x1000>;\n"
  "> +\t\t};\n"
@@ -84,9 +104,9 @@
  "> +\t\t\tinterrupts = <0 39 4>;\n"
  "> +\t\t};\n"
  "> +\n"
- ">  \t\tL2: l2-cache at fffef000 {\n"
+ ">  \t\tL2: l2-cache@fffef000 {\n"
  ">  \t\t\tcompatible = \"arm,pl310-cache\";\n"
  ">  \t\t\treg = <0xfffef000 0x1000>;\n"
  >
 
-c2c33538b34549e5deea5c8f06f1e7907d8b3e089cb454c9e6ef4c11a1242d25
+79f6fc531c8999776c7732bf7a50763619f44b842a29d3620843f4245da22fcb

diff --git a/a/1.txt b/N2/1.txt
index 7fadc0c..de99272 100644
--- a/a/1.txt
+++ b/N2/1.txt
@@ -6,7 +6,7 @@ Many thanks...
 
 Dinh
 
-On 8/11/14, 10:18 AM, tthayer at opensource.altera.com wrote:
+On 8/11/14, 10:18 AM, tthayer@opensource.altera.com wrote:
 > From: Thor Thayer <tthayer@opensource.altera.com>
 > 
 > Add the Altera SDRAM EDAC bindings and device tree changes to the Altera SoC project.
@@ -65,7 +65,7 @@ On 8/11/14, 10:18 AM, tthayer at opensource.altera.com wrote:
 >  			};
 >  		};
 >  
-> +		sdr: sdr at ffc25000 {
+> +		sdr: sdr@ffc25000 {
 > +			compatible = "syscon";
 > +			reg = <0xffc25000 0x1000>;
 > +		};
@@ -76,7 +76,7 @@ On 8/11/14, 10:18 AM, tthayer at opensource.altera.com wrote:
 > +			interrupts = <0 39 4>;
 > +		};
 > +
->  		L2: l2-cache at fffef000 {
+>  		L2: l2-cache@fffef000 {
 >  			compatible = "arm,pl310-cache";
 >  			reg = <0xfffef000 0x1000>;
 >
diff --git a/a/content_digest b/N2/content_digest
index 1004e01..707ba83 100644
--- a/a/content_digest
+++ b/N2/content_digest
@@ -1,9 +1,29 @@
  "ref\01407770293-27190-1-git-send-email-tthayer@opensource.altera.com\0"
  "ref\01407770293-27190-3-git-send-email-tthayer@opensource.altera.com\0"
- "From\0dinguyen@opensource.altera.com (Dinh Nguyen)\0"
- "Subject\0[PATCHv10 2/2] arm: dts: Add Altera SDRAM EDAC bindings & devicetree entries.\0"
+ "From\0Dinh Nguyen <dinguyen@opensource.altera.com>\0"
+ "Subject\0Re: [PATCHv10 2/2] arm: dts: Add Altera SDRAM EDAC bindings & devicetree entries.\0"
  "Date\0Tue, 2 Sep 2014 21:30:00 -0500\0"
- "To\0linux-arm-kernel@lists.infradead.org\0"
+ "To\0<tthayer@opensource.altera.com>"
+  <robherring2@gmail.com>
+  <pawel.moll@arm.com>
+  <mark.rutland@arm.com>
+  <ijc+devicetree@hellion.org.uk>
+  <galak@codeaurora.org>
+  <rob@landley.net>
+  <linux@arm.linux.org.uk>
+  <atull@opensource.altera.com>
+  <delicious.quinoa@gmail.com>
+  <dougthompson@xmission.com>
+  <grant.likely@linaro.org>
+  <bp@alien8.de>
+  <sameo@linux.intel.com>
+ " <lee.jones@linaro.org>\0"
+ "Cc\0<devicetree@vger.kernel.org>"
+  <linux-doc@vger.kernel.org>
+  <linux-edac@vger.kernel.org>
+  <linux-kernel@vger.kernel.org>
+  <linux-arm-kernel@lists.infradead.org>
+ " <tthayer.linux@gmail.com>\0"
  "\00:1\0"
  "b\0"
  "Hi DTS maintainers,\n"
@@ -14,7 +34,7 @@
  "\n"
  "Dinh\n"
  "\n"
- "On 8/11/14, 10:18 AM, tthayer at opensource.altera.com wrote:\n"
+ "On 8/11/14, 10:18 AM, tthayer@opensource.altera.com wrote:\n"
  "> From: Thor Thayer <tthayer@opensource.altera.com>\n"
  "> \n"
  "> Add the Altera SDRAM EDAC bindings and device tree changes to the Altera SoC project.\n"
@@ -73,7 +93,7 @@
  ">  \t\t\t};\n"
  ">  \t\t};\n"
  ">  \n"
- "> +\t\tsdr: sdr at ffc25000 {\n"
+ "> +\t\tsdr: sdr@ffc25000 {\n"
  "> +\t\t\tcompatible = \"syscon\";\n"
  "> +\t\t\treg = <0xffc25000 0x1000>;\n"
  "> +\t\t};\n"
@@ -84,9 +104,9 @@
  "> +\t\t\tinterrupts = <0 39 4>;\n"
  "> +\t\t};\n"
  "> +\n"
- ">  \t\tL2: l2-cache at fffef000 {\n"
+ ">  \t\tL2: l2-cache@fffef000 {\n"
  ">  \t\t\tcompatible = \"arm,pl310-cache\";\n"
  ">  \t\t\treg = <0xfffef000 0x1000>;\n"
  >
 
-c2c33538b34549e5deea5c8f06f1e7907d8b3e089cb454c9e6ef4c11a1242d25
+057ac2f810a097ba33d1be268be2eff6b91ff86b9bbfba9ae0558105d1b091f0

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