From mboxrd@z Thu Jan 1 00:00:00 1970 From: Alexander Graf Date: Wed, 03 Sep 2014 10:04:58 +0000 Subject: Re: [PATCH v2 1/2] KVM: PPC: e500mc: Add support for single threaded vcpus on e6500 core Message-Id: <5406E7CA.3040900@suse.de> List-Id: References: <1409562119-11090-1-git-send-email-mihai.caraman@freescale.com> In-Reply-To: <1409562119-11090-1-git-send-email-mihai.caraman@freescale.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: Mihai Caraman , kvm-ppc@vger.kernel.org Cc: kvm@vger.kernel.org On 01.09.14 11:01, Mihai Caraman wrote: > ePAPR represents hardware threads as cpu node properties in device tree. > So with existing QEMU, hardware threads are simply exposed as vcpus with > one hardware thread. > > The e6500 core shares TLBs between hardware threads. Without tlb write > conditional instruction, the Linux kernel uses per core mechanisms to > protect against duplicate TLB entries. > > The guest is unable to detect real siblings threads, so it can't use the > TLB protection mechanism. An alternative solution is to use the hypervisor > to allocate different lpids to guest's vcpus that runs simultaneous on real > siblings threads. On systems with two threads per core this patch halves > the size of the lpid pool that the allocator sees and use two lpids per VM. > Use even numbers to speedup vcpu lpid computation with consecutive lpids > per VM: vm1 will use lpids 2 and 3, vm2 lpids 4 and 5, and so on. > > Signed-off-by: Mihai Caraman Thanks, applied both to kvm-ppc-queue. Alex From mboxrd@z Thu Jan 1 00:00:00 1970 From: Alexander Graf Subject: Re: [PATCH v2 1/2] KVM: PPC: e500mc: Add support for single threaded vcpus on e6500 core Date: Wed, 03 Sep 2014 12:04:58 +0200 Message-ID: <5406E7CA.3040900@suse.de> References: <1409562119-11090-1-git-send-email-mihai.caraman@freescale.com> Mime-Version: 1.0 Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Cc: kvm@vger.kernel.org To: Mihai Caraman , kvm-ppc@vger.kernel.org Return-path: In-Reply-To: <1409562119-11090-1-git-send-email-mihai.caraman@freescale.com> Sender: kvm-ppc-owner@vger.kernel.org List-Id: kvm.vger.kernel.org On 01.09.14 11:01, Mihai Caraman wrote: > ePAPR represents hardware threads as cpu node properties in device tree. > So with existing QEMU, hardware threads are simply exposed as vcpus with > one hardware thread. > > The e6500 core shares TLBs between hardware threads. Without tlb write > conditional instruction, the Linux kernel uses per core mechanisms to > protect against duplicate TLB entries. > > The guest is unable to detect real siblings threads, so it can't use the > TLB protection mechanism. An alternative solution is to use the hypervisor > to allocate different lpids to guest's vcpus that runs simultaneous on real > siblings threads. On systems with two threads per core this patch halves > the size of the lpid pool that the allocator sees and use two lpids per VM. > Use even numbers to speedup vcpu lpid computation with consecutive lpids > per VM: vm1 will use lpids 2 and 3, vm2 lpids 4 and 5, and so on. > > Signed-off-by: Mihai Caraman Thanks, applied both to kvm-ppc-queue. Alex