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From: Alexander Graf <agraf@suse.de>
To: Jens Freimann <jfrei@linux.vnet.ibm.com>,
	Christian Borntraeger <borntraeger@de.ibm.com>,
	Cornelia Huck <cornelia.huck@de.ibm.com>
Cc: qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH 2/3] s390x/css: support format-0 ccws
Date: Fri, 05 Sep 2014 00:29:33 +0200	[thread overview]
Message-ID: <5408E7CD.4030506@suse.de> (raw)
In-Reply-To: <1409844743-31009-3-git-send-email-jfrei@linux.vnet.ibm.com>



On 04.09.14 17:32, Jens Freimann wrote:
> From: Cornelia Huck <cornelia.huck@de.ibm.com>
> 
> Add support for format-0 ccws in channel programs. As a format-1 ccw
> contains the same information as format-0 ccws, only supporting larger
> addresses, simply convert every ccw to format-1 as we walk the chain.
> 
> Reviewed-by: David Hildenbrand <dahi@linux.vnet.ibm.com>
> Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
> ---
>  hw/s390x/css.c        | 30 +++++++++++++++++++++---------
>  hw/s390x/css.h        |  1 +
>  target-s390x/ioinst.h | 10 ++++++++++
>  3 files changed, 32 insertions(+), 9 deletions(-)
> 
> diff --git a/hw/s390x/css.c b/hw/s390x/css.c
> index 49c2aaf..34637cb 100644
> --- a/hw/s390x/css.c
> +++ b/hw/s390x/css.c
> @@ -243,17 +243,25 @@ static void copy_sense_id_to_guest(SenseId *dest, SenseId *src)
>      }
>  }
>  
> -static CCW1 copy_ccw_from_guest(hwaddr addr)
> +static CCW1 copy_ccw_from_guest(hwaddr addr, bool fmt1)
>  {
> -    CCW1 tmp;
> +    CCW0 tmp0;
> +    CCW1 tmp1;
>      CCW1 ret;
>  
> -    cpu_physical_memory_read(addr, &tmp, sizeof(tmp));
> -    ret.cmd_code = tmp.cmd_code;
> -    ret.flags = tmp.flags;
> -    ret.count = be16_to_cpu(tmp.count);
> -    ret.cda = be32_to_cpu(tmp.cda);
> -
> +    if (fmt1) {
> +        cpu_physical_memory_read(addr, &tmp1, sizeof(tmp1));
> +        ret.cmd_code = tmp1.cmd_code;
> +        ret.flags = tmp1.flags;
> +        ret.count = be16_to_cpu(tmp1.count);
> +        ret.cda = be32_to_cpu(tmp1.cda);
> +    } else {
> +        cpu_physical_memory_read(addr, &tmp0, sizeof(tmp0));
> +        ret.cmd_code = tmp0.cmd_code;
> +        ret.flags = tmp0.flags;
> +        ret.count = be16_to_cpu(tmp0.count);
> +        ret.cda = be16_to_cpu(tmp0.cda1) | (tmp0.cda0 << 16);
> +    }
>      return ret;
>  }
>  
> @@ -268,7 +276,8 @@ static int css_interpret_ccw(SubchDev *sch, hwaddr ccw_addr)
>          return -EIO;
>      }
>  
> -    ccw = copy_ccw_from_guest(ccw_addr);
> +    /* Translate everything to format-1 ccws - the information is the same. */
> +    ccw = copy_ccw_from_guest(ccw_addr, sch->ccw_fmt_1);
>  
>      /* Check for invalid command codes. */
>      if ((ccw.cmd_code & 0x0f) == 0) {
> @@ -386,6 +395,7 @@ static void sch_handle_start_func(SubchDev *sch, ORB *orb)
>              s->ctrl |= (SCSW_STCTL_ALERT | SCSW_STCTL_STATUS_PEND);
>              return;
>          }
> +        sch->ccw_fmt_1 = !!(orb->ctrl0 & ORB_CTRL0_MASK_FMT);
>      } else {
>          s->ctrl &= ~(SCSW_ACTL_SUSP | SCSW_ACTL_RESUME_PEND);
>      }
> @@ -1347,6 +1357,7 @@ void subch_device_save(SubchDev *s, QEMUFile *f)
>          qemu_put_byte(f, s->id.ciw[i].command);
>          qemu_put_be16(f, s->id.ciw[i].count);
>      }
> +    qemu_put_byte(f, s->ccw_fmt_1);

This changes the migration stream format. Please increase the version
number for the device that gets migrated, so that we have the chance to
catch it.

Though - does migration work at all yet? :)


Alex

>      return;
>  }
>  
> @@ -1402,6 +1413,7 @@ int subch_device_load(SubchDev *s, QEMUFile *f)
>          s->id.ciw[i].command = qemu_get_byte(f);
>          s->id.ciw[i].count = qemu_get_be16(f);
>      }
> +    s->ccw_fmt_1 = qemu_get_byte(f);
>      return 0;
>  }
>  
> diff --git a/hw/s390x/css.h b/hw/s390x/css.h
> index c864ea7..384a455 100644
> --- a/hw/s390x/css.h
> +++ b/hw/s390x/css.h
> @@ -76,6 +76,7 @@ struct SubchDev {
>      hwaddr channel_prog;
>      CCW1 last_cmd;
>      bool last_cmd_valid;
> +    bool ccw_fmt_1;
>      bool thinint_active;
>      /* transport-provided data: */
>      int (*ccw_cb) (SubchDev *, CCW1);
> diff --git a/target-s390x/ioinst.h b/target-s390x/ioinst.h
> index 5bbc67d..29f6423 100644
> --- a/target-s390x/ioinst.h
> +++ b/target-s390x/ioinst.h
> @@ -156,6 +156,16 @@ typedef struct ORB {
>  #define ORB_CTRL1_MASK_ORBX 0x01
>  #define ORB_CTRL1_MASK_INVALID 0x3e
>  
> +/* channel command word (type 0) */
> +typedef struct CCW0 {
> +        uint8_t cmd_code;
> +        uint8_t cda0;
> +        uint16_t cda1;
> +        uint8_t flags;
> +        uint8_t reserved;
> +        uint16_t count;
> +} QEMU_PACKED CCW0;
> +
>  /* channel command word (type 1) */
>  typedef struct CCW1 {
>      uint8_t cmd_code;
> 

  reply	other threads:[~2014-09-04 22:29 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-09-04 15:32 [Qemu-devel] [PATCH 0/3] s390x: css patches and small sclp cleanup Jens Freimann
2014-09-04 15:32 ` [Qemu-devel] [PATCH 1/3] s390x: remove duplicate defines in SCLP code Jens Freimann
2014-09-04 15:32 ` [Qemu-devel] [PATCH 2/3] s390x/css: support format-0 ccws Jens Freimann
2014-09-04 22:29   ` Alexander Graf [this message]
2014-09-05  7:23     ` Christian Borntraeger
2014-09-05  7:25       ` Alexander Graf
2014-09-04 15:32 ` [Qemu-devel] [PATCH 3/3] s390x/css: catch ccw sequence errors Jens Freimann
2014-09-04 17:58 ` [Qemu-devel] [PATCH 0/3] s390x: css patches and small sclp cleanup Christian Borntraeger
  -- strict thread matches above, loose matches on Subject: below --
2014-09-05  7:33 [Qemu-devel] [PATCH 0/3 RESEND] " Jens Freimann
2014-09-05  7:33 ` [Qemu-devel] [PATCH 2/3] s390x/css: support format-0 ccws Jens Freimann

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