From mboxrd@z Thu Jan 1 00:00:00 1970 From: =?windows-1252?Q?Michel_D=E4nzer?= Subject: Re: [Mesa-dev] [PATCH] drm/radeon: Add RADEON_GEM_CPU_ACCESS BO creation flag Date: Tue, 09 Sep 2014 09:47:36 +0900 Message-ID: <540E4E28.50701@daenzer.net> References: <1409208961-7322-1-git-send-email-michel@daenzer.net> <53FEEEF4.7030401@vodafone.de> <53FFDB6B.5050105@daenzer.net> Mime-Version: 1.0 Content-Type: text/plain; charset="windows-1252"; Format="flowed" Content-Transfer-Encoding: quoted-printable Return-path: In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Alex Deucher Cc: "mesa-dev@lists.freedesktop.org" , Maling list - DRI developers List-Id: dri-devel@lists.freedesktop.org On 09.09.2014 02:36, Alex Deucher wrote: > > Updated version with comments integrated. [...] > @@ -314,10 +314,12 @@ int radeon_bo_pin_restricted(struct radeon_bo *bo, = u32 domain, u64 max_offset, > unsigned lpfn =3D 0; > > /* force to pin into visible video ram */ > - if (bo->placements[i].flags & TTM_PL_FLAG_VRAM) > - lpfn =3D bo->rdev->mc.visible_vram_size >> PAGE_SHIFT; > - else > + if (bo->placements[i].flags & TTM_PL_FLAG_VRAM) { > + if (!(bo->flags & RADEON_GEM_NO_CPU_ACCESS)) > + lpfn =3D bo->rdev->mc.visible_vram_size >> PAGE_SHIFT; > + } else { > lpfn =3D bo->rdev->mc.gtt_size >> PAGE_SHIFT; /* ??? */ > + } The else block can be removed as well, but that can be done in another = patch. Either way, v2 is Reviewed-by: Michel D=E4nzer -- = Earthling Michel D=E4nzer | http://www.amd.com Libre software enthusiast | Mesa and X developer