Re: [PATCH v2] xen/arm: Correctly support WARN_ON

[Julien Grall <julien.grall@linaro.org>]

Hi Ian,

On 10/09/14 02:35, Ian Campbell wrote:
> On Tue, 2014-09-09 at 11:31 -0700, Julien Grall wrote:
>> Hi Ian,
>>
>> On 09/09/14 02:17, Ian Campbell wrote:
>>> On Mon, 2014-09-08 at 12:19 -0700, Julien Grall wrote:
>>>> Hi Ian,
>>>>
>>>> On 08/09/14 06:01, Ian Campbell wrote:
>>>>>> +    /* PC is always 4-byte align, as Xen is using ARM instruction set */
>>>>>
>>>>> "aligned"
>>>>
>>>> Ok.
>>>>
>>>>> Is it worth a check here? I presume the nested fault if PC were
>>>>> misaligned would be pretty exciting, print+goto die would seem
>>>>> appropriate.
>>>>
>>>> I don't think so. The "undefined instruction" is only used when the
>>>> processor is unable to decode the instruction. If it fails to load the
>>>> instruction (because a wrong memory address, pc misaligned), Xen would
>>>> have received a "prefetch abort".
>>>
>>> I was thinking of something either wrongly or rightly transitioning to
>>> thumb mode. It'd have to be something horrible like a broken firmware
>>> returning from a PSCI call in the wrong mode or something like that
>>> though.
>>
>> The thumb mode is stored in SPSR which is a banked registers. Your use
>> case can only happen if the secure mode decides to modify the registers
>> of the hypervisor. It would be very stupid from the firmware and other
>> bad things could happen.
>
> Yes, as I said it would need to be horribly broken firmware. I wouldn't
> rule out the ability of firmware to do horribly broken things though.

Ok. I will add a check and directly go to die.

Regards,


-- 
Julien Grall