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From: Stefan Roese <sr@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [WIP PATCH 0/2] arm: socfpga: Add Cadence QSPI support
Date: Tue, 23 Sep 2014 12:50:46 +0200	[thread overview]
Message-ID: <54215086.7060406@denx.de> (raw)
In-Reply-To: <1411467619.2065.2.camel@clsee-VirtualBox.altera.com>

Hi Chin Liang,

On 23.09.2014 12:20, Chin Liang See wrote:
>> Perhaps somebody from Altera with deeper Cadence SPI controller knowledge
>> can take a quick look at this. Could be a pretty obvious mistake that I
>> made while copying / porting the code. Or something else thats simply
>> missing.
>>
>> Any hints are really appretiated!
>>
>
> Dear Stefan,
>
> I can help to take a look as I was trying to upstream this code
> previously. But it was later on hold as the SPI driver / framework is
> under going some revamp. Hopefully I have some bandwidth tomorrow to
> start looking into Marek and your patches.

Thanks! That would be great. I'll continue a bit this afternoon with 
this task as its a bit pressing right now. I'll let you know if I find 
the problem.

Thanks,
Stefan

      reply	other threads:[~2014-09-23 10:50 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-09-22 14:28 [U-Boot] [WIP PATCH 0/2] arm: socfpga: Add Cadence QSPI support Stefan Roese
2014-09-22 14:28 ` [U-Boot] [WIP PATCH 1/2] spi: Add Cadence QSPI driver used by SoCFPGA Stefan Roese
2014-09-22 14:28 ` [U-Boot] [WIP PATCH 2/2] arm: socfpga: Add Cadence QSPI support to config header Stefan Roese
2014-09-23 10:20 ` [U-Boot] [WIP PATCH 0/2] arm: socfpga: Add Cadence QSPI support Chin Liang See
2014-09-23 10:50   ` Stefan Roese [this message]

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