diff for duplicates of <5421A28E.7060600@gmail.com> diff --git a/a/1.txt b/N1/1.txt index 3e53fc5..40e3a5a 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -3,20 +3,20 @@ On 09/23/2014 06:29 PM, Arnd Bergmann wrote: >> For reference, this is what we have for MVEBU SoCs with multiple ports >> per controller: >> ->> eth: ethernet-ctrl at 72000 { +>> eth: ethernet-ctrl@72000 { >> compatible = "marvell,orion-eth"; ... >> reg = <0x72000 0x4000>; ... >> ->> ethernet-port at 0 { +>> ethernet-port@0 { >> compatible = "marvell,orion-eth-port"; ... >> phy-handle = <ðphy>; >> }; >> }; >> ->> mdio: mdio-bus at 72004 { +>> mdio: mdio-bus@72004 { >> compatible = "marvell,orion-mdio"; ... >> reg = <0x72004 0x84>; @@ -43,3 +43,7 @@ place to put it in. The HEC PHY will reside within the CEC IP node but that is compatible with Antoine's proposal. Sebastian +-- +To unsubscribe from this list: send the line "unsubscribe devicetree" in +the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org +More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/a/content_digest b/N1/content_digest index f2cf49f..bdd23d6 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -2,10 +2,19 @@ "ref\04014272.rJbSfrLcuB@wuerfel\0" "ref\0542195B0.6080706@gmail.com\0" "ref\09401592.hUYDkriFVO@wuerfel\0" - "From\0sebastian.hesselbarth@gmail.com (Sebastian Hesselbarth)\0" - "Subject\0[PATCH v4 3/9] Documentation: bindings: net: add the Marvell PXA168 Ethernet controller\0" + "From\0Sebastian Hesselbarth <sebastian.hesselbarth-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>\0" + "Subject\0Re: [PATCH v4 3/9] Documentation: bindings: net: add the Marvell PXA168 Ethernet controller\0" "Date\0Tue, 23 Sep 2014 18:40:46 +0200\0" - "To\0linux-arm-kernel@lists.infradead.org\0" + "To\0Arnd Bergmann <arnd-r2nGTMty4D4@public.gmane.org>" + " linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org\0" + "Cc\0thomas.petazzoni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org" + zmxu-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org + devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org + netdev-u79uwXL29TY76Z2rM5mHXA@public.gmane.org + Antoine Tenart <antoine.tenart-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> + linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org + alexandre.belloni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org + " jszhang-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org\0" "\00:1\0" "b\0" "On 09/23/2014 06:29 PM, Arnd Bergmann wrote:\n" @@ -13,20 +22,20 @@ ">> For reference, this is what we have for MVEBU SoCs with multiple ports\n" ">> per controller:\n" ">>\n" - ">> eth: ethernet-ctrl at 72000 {\n" + ">> eth: ethernet-ctrl@72000 {\n" ">> compatible = \"marvell,orion-eth\";\n" "...\n" ">> reg = <0x72000 0x4000>;\n" "...\n" ">>\n" - ">> ethernet-port at 0 {\n" + ">> ethernet-port@0 {\n" ">> compatible = \"marvell,orion-eth-port\";\n" "...\n" ">> phy-handle = <ðphy>;\n" ">> };\n" ">> };\n" ">>\n" - ">> mdio: mdio-bus at 72004 {\n" + ">> mdio: mdio-bus@72004 {\n" ">> compatible = \"marvell,orion-mdio\";\n" "...\n" ">> reg = <0x72004 0x84>;\n" @@ -52,6 +61,10 @@ "place to put it in. The HEC PHY will reside within the CEC IP node but\n" "that is compatible with Antoine's proposal.\n" "\n" - Sebastian + "Sebastian\n" + "--\n" + "To unsubscribe from this list: send the line \"unsubscribe devicetree\" in\n" + "the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\n" + More majordomo info at http://vger.kernel.org/majordomo-info.html -2ccaf1c391ce23c5fc5d917138ef52bf5b75eac247521eb610f71dd8bd7dfca4 +6372c25ff302ccae6babeac5f72705edd0157c19d8932072f76942de80566c44
diff --git a/a/1.txt b/N2/1.txt index 3e53fc5..6026642 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -3,20 +3,20 @@ On 09/23/2014 06:29 PM, Arnd Bergmann wrote: >> For reference, this is what we have for MVEBU SoCs with multiple ports >> per controller: >> ->> eth: ethernet-ctrl at 72000 { +>> eth: ethernet-ctrl@72000 { >> compatible = "marvell,orion-eth"; ... >> reg = <0x72000 0x4000>; ... >> ->> ethernet-port at 0 { +>> ethernet-port@0 { >> compatible = "marvell,orion-eth-port"; ... >> phy-handle = <ðphy>; >> }; >> }; >> ->> mdio: mdio-bus at 72004 { +>> mdio: mdio-bus@72004 { >> compatible = "marvell,orion-mdio"; ... >> reg = <0x72004 0x84>; diff --git a/a/content_digest b/N2/content_digest index f2cf49f..b6870fc 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -2,10 +2,19 @@ "ref\04014272.rJbSfrLcuB@wuerfel\0" "ref\0542195B0.6080706@gmail.com\0" "ref\09401592.hUYDkriFVO@wuerfel\0" - "From\0sebastian.hesselbarth@gmail.com (Sebastian Hesselbarth)\0" - "Subject\0[PATCH v4 3/9] Documentation: bindings: net: add the Marvell PXA168 Ethernet controller\0" + "From\0Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>\0" + "Subject\0Re: [PATCH v4 3/9] Documentation: bindings: net: add the Marvell PXA168 Ethernet controller\0" "Date\0Tue, 23 Sep 2014 18:40:46 +0200\0" - "To\0linux-arm-kernel@lists.infradead.org\0" + "To\0Arnd Bergmann <arnd@arndb.de>" + " linux-arm-kernel@lists.infradead.org\0" + "Cc\0thomas.petazzoni@free-electrons.com" + zmxu@marvell.com + devicetree@vger.kernel.org + netdev@vger.kernel.org + Antoine Tenart <antoine.tenart@free-electrons.com> + linux-kernel@vger.kernel.org + alexandre.belloni@free-electrons.com + " jszhang@marvell.com\0" "\00:1\0" "b\0" "On 09/23/2014 06:29 PM, Arnd Bergmann wrote:\n" @@ -13,20 +22,20 @@ ">> For reference, this is what we have for MVEBU SoCs with multiple ports\n" ">> per controller:\n" ">>\n" - ">> eth: ethernet-ctrl at 72000 {\n" + ">> eth: ethernet-ctrl@72000 {\n" ">> compatible = \"marvell,orion-eth\";\n" "...\n" ">> reg = <0x72000 0x4000>;\n" "...\n" ">>\n" - ">> ethernet-port at 0 {\n" + ">> ethernet-port@0 {\n" ">> compatible = \"marvell,orion-eth-port\";\n" "...\n" ">> phy-handle = <ðphy>;\n" ">> };\n" ">> };\n" ">>\n" - ">> mdio: mdio-bus at 72004 {\n" + ">> mdio: mdio-bus@72004 {\n" ">> compatible = \"marvell,orion-mdio\";\n" "...\n" ">> reg = <0x72004 0x84>;\n" @@ -54,4 +63,4 @@ "\n" Sebastian -2ccaf1c391ce23c5fc5d917138ef52bf5b75eac247521eb610f71dd8bd7dfca4 +5d332251ef5897941a0920d12b8a69a0a705843ecf1bc29819d2bbd50ac5cf82
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