From mboxrd@z Thu Jan 1 00:00:00 1970 From: Yijing Wang Subject: Re: [PATCH v2 12/22] MIPS/Octeon/MSI: Use MSI chip framework to configure MSI/MSI-X irq Date: Fri, 26 Sep 2014 10:12:00 +0800 Message-ID: <5424CB70.9020800@huawei.com> References: <1411614872-4009-1-git-send-email-wangyijing@huawei.com> <1411614872-4009-13-git-send-email-wangyijing@huawei.com> <20140925073435.GJ12423@ulmo> Mime-Version: 1.0 Content-Type: text/plain; charset="ISO-8859-1" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <20140925073435.GJ12423@ulmo> Sender: linux-ia64-owner@vger.kernel.org To: Thierry Reding Cc: Bjorn Helgaas , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Xinwei Hu , Wuyun , linux-arm-kernel@lists.infradead.org, Russell King , linux-arch@vger.kernel.org, arnab.basu@freescale.com, Bharat.Bhushan@freescale.com, x86@kernel.org, Arnd Bergmann , Thomas Gleixner , Konrad Rzeszutek Wilk , xen-devel@lists.xenproject.org, Joerg Roedel , iommu@lists.linux-foundation.org, linux-mips@linux-mips.org, Benjamin Herrenschmidt , linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org, Sebastian Ott , Tony Luck , linux-ia64@vger.kernel.org, "David S. Miller" , sparclinux@vger.ke List-Id: linux-arch.vger.kernel.org On 2014/9/25 15:34, Thierry Reding wrote: > On Thu, Sep 25, 2014 at 11:14:22AM +0800, Yijing Wang wrote: > [...] >> diff --git a/arch/mips/pci/msi-octeon.c b/arch/mips/pci/msi-octeon.c > [...] >> @@ -132,12 +132,12 @@ msi_irq_allocated: >> /* Make sure the search for available interrupts didn't fail */ >> if (irq >= 64) { >> if (request_private_bits) { >> - pr_err("arch_setup_msi_irq: Unable to find %d free interrupts, trying just one", >> + pr_err("octeon_setup_msi_irq: Unable to find %d free interrupts, trying just one", >> 1 << request_private_bits); > > Perhaps while at it make this (and other similar changes in this patch): > > pr_err("%s(): Unable to ...", __func__, ...); Will update it, thanks! > > So that it becomes more resilient against this kind of rename? > >> request_private_bits = 0; >> goto try_only_one; >> } else >> - panic("arch_setup_msi_irq: Unable to find a free MSI interrupt"); >> + panic("octeon_setup_msi_irq: Unable to find a free MSI interrupt"); > >> @@ -210,14 +210,13 @@ int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) >> >> return 0; >> } >> - > > This... OK > >> @@ -240,7 +239,7 @@ void arch_teardown_msi_irq(unsigned int irq) >> */ >> number_irqs = 0; >> while ((irq0 + number_irqs < 64) && >> - (msi_multiple_irq_bitmask[index] >> + (msi_multiple_irq_bitmask[index] > > ... and this seem like unrelated whitespace changes. OK > >> & (1ull << (irq0 + number_irqs)))) >> number_irqs++; >> number_irqs++; >> @@ -249,8 +248,8 @@ void arch_teardown_msi_irq(unsigned int irq) >> /* Shift the mask to the correct bit location */ >> bitmask <<= irq0; >> if ((msi_free_irq_bitmask[index] & bitmask) != bitmask) >> - panic("arch_teardown_msi_irq: Attempted to teardown MSI " >> - "interrupt (%d) not in use", irq); >> + panic("octeon_teardown_msi_irq: Attempted to teardown MSI " >> + "interrupt (%d) not in use", irq); > > And the second line here also needlessly changes the indentation. OK > > Thierry > -- Thanks! Yijing From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from szxga02-in.huawei.com ([119.145.14.65]:59574 "EHLO szxga02-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752913AbaIZCMw (ORCPT ); Thu, 25 Sep 2014 22:12:52 -0400 Message-ID: <5424CB70.9020800@huawei.com> Date: Fri, 26 Sep 2014 10:12:00 +0800 From: Yijing Wang MIME-Version: 1.0 Subject: Re: [PATCH v2 12/22] MIPS/Octeon/MSI: Use MSI chip framework to configure MSI/MSI-X irq References: <1411614872-4009-1-git-send-email-wangyijing@huawei.com> <1411614872-4009-13-git-send-email-wangyijing@huawei.com> <20140925073435.GJ12423@ulmo> In-Reply-To: <20140925073435.GJ12423@ulmo> Content-Type: text/plain; charset="ISO-8859-1" Content-Transfer-Encoding: 7bit Sender: linux-arch-owner@vger.kernel.org List-ID: To: Thierry Reding Cc: Bjorn Helgaas , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Xinwei Hu , Wuyun , linux-arm-kernel@lists.infradead.org, Russell King , linux-arch@vger.kernel.org, arnab.basu@freescale.com, Bharat.Bhushan@freescale.com, x86@kernel.org, Arnd Bergmann , Thomas Gleixner , Konrad Rzeszutek Wilk , xen-devel@lists.xenproject.org, Joerg Roedel , iommu@lists.linux-foundation.org, linux-mips@linux-mips.org, Benjamin Herrenschmidt , linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org, Sebastian Ott , Tony Luck , linux-ia64@vger.kernel.org, "David S. Miller" , sparclinux@vger.kernel.org, Chris Metcalf , Ralf Baechle , Lucas Stach , David Vrabel , Sergei Shtylyov , Michael Ellerman , Thomas Petazzoni Message-ID: <20140926021200.7p5i7BZt4tBoTguqt-ytxLASHJbFlDzCkARISk-YWFw@z> On 2014/9/25 15:34, Thierry Reding wrote: > On Thu, Sep 25, 2014 at 11:14:22AM +0800, Yijing Wang wrote: > [...] >> diff --git a/arch/mips/pci/msi-octeon.c b/arch/mips/pci/msi-octeon.c > [...] >> @@ -132,12 +132,12 @@ msi_irq_allocated: >> /* Make sure the search for available interrupts didn't fail */ >> if (irq >= 64) { >> if (request_private_bits) { >> - pr_err("arch_setup_msi_irq: Unable to find %d free interrupts, trying just one", >> + pr_err("octeon_setup_msi_irq: Unable to find %d free interrupts, trying just one", >> 1 << request_private_bits); > > Perhaps while at it make this (and other similar changes in this patch): > > pr_err("%s(): Unable to ...", __func__, ...); Will update it, thanks! > > So that it becomes more resilient against this kind of rename? > >> request_private_bits = 0; >> goto try_only_one; >> } else >> - panic("arch_setup_msi_irq: Unable to find a free MSI interrupt"); >> + panic("octeon_setup_msi_irq: Unable to find a free MSI interrupt"); > >> @@ -210,14 +210,13 @@ int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) >> >> return 0; >> } >> - > > This... OK > >> @@ -240,7 +239,7 @@ void arch_teardown_msi_irq(unsigned int irq) >> */ >> number_irqs = 0; >> while ((irq0 + number_irqs < 64) && >> - (msi_multiple_irq_bitmask[index] >> + (msi_multiple_irq_bitmask[index] > > ... and this seem like unrelated whitespace changes. OK > >> & (1ull << (irq0 + number_irqs)))) >> number_irqs++; >> number_irqs++; >> @@ -249,8 +248,8 @@ void arch_teardown_msi_irq(unsigned int irq) >> /* Shift the mask to the correct bit location */ >> bitmask <<= irq0; >> if ((msi_free_irq_bitmask[index] & bitmask) != bitmask) >> - panic("arch_teardown_msi_irq: Attempted to teardown MSI " >> - "interrupt (%d) not in use", irq); >> + panic("octeon_teardown_msi_irq: Attempted to teardown MSI " >> + "interrupt (%d) not in use", irq); > > And the second line here also needlessly changes the indentation. OK > > Thierry > -- Thanks! Yijing From mboxrd@z Thu Jan 1 00:00:00 1970 From: Yijing Wang Date: Fri, 26 Sep 2014 02:12:00 +0000 Subject: Re: [PATCH v2 12/22] MIPS/Octeon/MSI: Use MSI chip framework to configure MSI/MSI-X irq Message-Id: <5424CB70.9020800@huawei.com> List-Id: References: <1411614872-4009-1-git-send-email-wangyijing@huawei.com> <1411614872-4009-13-git-send-email-wangyijing@huawei.com> <20140925073435.GJ12423@ulmo> In-Reply-To: <20140925073435.GJ12423@ulmo> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: Thierry Reding Cc: Bjorn Helgaas , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Xinwei Hu , Wuyun , linux-arm-kernel@lists.infradead.org, Russell King , linux-arch@vger.kernel.org, arnab.basu@freescale.com, Bharat.Bhushan@freescale.com, x86@kernel.org, Arnd Bergmann , Thomas Gleixner , Konrad Rzeszutek Wilk , xen-devel@lists.xenproject.org, Joerg Roedel , iommu@lists.linux-foundation.org, linux-mips@linux-mips.org, Benjamin Herrenschmidt , linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org, Sebastian Ott , Tony Luck , linux-ia64@vger.kernel.org, "David S. Miller" , sparclinux@vger.kernel.org, Chris Metcalf , Ralf Baechle , Lucas Stach , David Vrabel , Sergei Shtylyov , Michael Ellerman , Thomas Petazzoni On 2014/9/25 15:34, Thierry Reding wrote: > On Thu, Sep 25, 2014 at 11:14:22AM +0800, Yijing Wang wrote: > [...] >> diff --git a/arch/mips/pci/msi-octeon.c b/arch/mips/pci/msi-octeon.c > [...] >> @@ -132,12 +132,12 @@ msi_irq_allocated: >> /* Make sure the search for available interrupts didn't fail */ >> if (irq >= 64) { >> if (request_private_bits) { >> - pr_err("arch_setup_msi_irq: Unable to find %d free interrupts, trying just one", >> + pr_err("octeon_setup_msi_irq: Unable to find %d free interrupts, trying just one", >> 1 << request_private_bits); > > Perhaps while at it make this (and other similar changes in this patch): > > pr_err("%s(): Unable to ...", __func__, ...); Will update it, thanks! > > So that it becomes more resilient against this kind of rename? > >> request_private_bits = 0; >> goto try_only_one; >> } else >> - panic("arch_setup_msi_irq: Unable to find a free MSI interrupt"); >> + panic("octeon_setup_msi_irq: Unable to find a free MSI interrupt"); > >> @@ -210,14 +210,13 @@ int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) >> >> return 0; >> } >> - > > This... OK > >> @@ -240,7 +239,7 @@ void arch_teardown_msi_irq(unsigned int irq) >> */ >> number_irqs = 0; >> while ((irq0 + number_irqs < 64) && >> - (msi_multiple_irq_bitmask[index] >> + (msi_multiple_irq_bitmask[index] > > ... and this seem like unrelated whitespace changes. OK > >> & (1ull << (irq0 + number_irqs)))) >> number_irqs++; >> number_irqs++; >> @@ -249,8 +248,8 @@ void arch_teardown_msi_irq(unsigned int irq) >> /* Shift the mask to the correct bit location */ >> bitmask <<= irq0; >> if ((msi_free_irq_bitmask[index] & bitmask) != bitmask) >> - panic("arch_teardown_msi_irq: Attempted to teardown MSI " >> - "interrupt (%d) not in use", irq); >> + panic("octeon_teardown_msi_irq: Attempted to teardown MSI " >> + "interrupt (%d) not in use", irq); > > And the second line here also needlessly changes the indentation. OK > > Thierry > -- Thanks! Yijing From mboxrd@z Thu Jan 1 00:00:00 1970 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 26 Sep 2014 04:13:40 +0200 (CEST) Received: from szxga02-in.huawei.com ([119.145.14.65]:36484 "EHLO szxga02-in.huawei.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S27006668AbaIZCNfqifAY (ORCPT ); Fri, 26 Sep 2014 04:13:35 +0200 Received: from 172.24.2.119 (EHLO szxeml405-hub.china.huawei.com) ([172.24.2.119]) by szxrg02-dlp.huawei.com (MOS 4.3.7-GA FastPath queued) with ESMTP id BZZ11143; Fri, 26 Sep 2014 10:12:21 +0800 (CST) Received: from [127.0.0.1] (10.177.27.212) by szxeml405-hub.china.huawei.com (10.82.67.60) with Microsoft SMTP Server id 14.3.158.1; Fri, 26 Sep 2014 10:12:09 +0800 Message-ID: <5424CB70.9020800@huawei.com> Date: Fri, 26 Sep 2014 10:12:00 +0800 From: Yijing Wang User-Agent: Mozilla/5.0 (Windows NT 6.1; rv:24.0) Gecko/20100101 Thunderbird/24.0.1 MIME-Version: 1.0 To: Thierry Reding CC: Bjorn Helgaas , , , Xinwei Hu , Wuyun , , Russell King , , , , , Arnd Bergmann , Thomas Gleixner , "Konrad Rzeszutek Wilk" , , Joerg Roedel , , , Benjamin Herrenschmidt , , , Sebastian Ott , "Tony Luck" , , "David S. Miller" , , Chris Metcalf , Ralf Baechle , Lucas Stach , David Vrabel , "Sergei Shtylyov" , Michael Ellerman , Thomas Petazzoni Subject: Re: [PATCH v2 12/22] MIPS/Octeon/MSI: Use MSI chip framework to configure MSI/MSI-X irq References: <1411614872-4009-1-git-send-email-wangyijing@huawei.com> <1411614872-4009-13-git-send-email-wangyijing@huawei.com> <20140925073435.GJ12423@ulmo> In-Reply-To: <20140925073435.GJ12423@ulmo> Content-Type: text/plain; charset="ISO-8859-1" Content-Transfer-Encoding: 7bit X-Originating-IP: [10.177.27.212] X-CFilter-Loop: Reflected Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 42823 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: wangyijing@huawei.com Precedence: bulk List-help: List-unsubscribe: List-software: Ecartis version 1.0.0 List-Id: linux-mips X-List-ID: linux-mips List-subscribe: List-owner: List-post: List-archive: X-list: linux-mips On 2014/9/25 15:34, Thierry Reding wrote: > On Thu, Sep 25, 2014 at 11:14:22AM +0800, Yijing Wang wrote: > [...] >> diff --git a/arch/mips/pci/msi-octeon.c b/arch/mips/pci/msi-octeon.c > [...] >> @@ -132,12 +132,12 @@ msi_irq_allocated: >> /* Make sure the search for available interrupts didn't fail */ >> if (irq >= 64) { >> if (request_private_bits) { >> - pr_err("arch_setup_msi_irq: Unable to find %d free interrupts, trying just one", >> + pr_err("octeon_setup_msi_irq: Unable to find %d free interrupts, trying just one", >> 1 << request_private_bits); > > Perhaps while at it make this (and other similar changes in this patch): > > pr_err("%s(): Unable to ...", __func__, ...); Will update it, thanks! > > So that it becomes more resilient against this kind of rename? > >> request_private_bits = 0; >> goto try_only_one; >> } else >> - panic("arch_setup_msi_irq: Unable to find a free MSI interrupt"); >> + panic("octeon_setup_msi_irq: Unable to find a free MSI interrupt"); > >> @@ -210,14 +210,13 @@ int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) >> >> return 0; >> } >> - > > This... OK > >> @@ -240,7 +239,7 @@ void arch_teardown_msi_irq(unsigned int irq) >> */ >> number_irqs = 0; >> while ((irq0 + number_irqs < 64) && >> - (msi_multiple_irq_bitmask[index] >> + (msi_multiple_irq_bitmask[index] > > ... and this seem like unrelated whitespace changes. OK > >> & (1ull << (irq0 + number_irqs)))) >> number_irqs++; >> number_irqs++; >> @@ -249,8 +248,8 @@ void arch_teardown_msi_irq(unsigned int irq) >> /* Shift the mask to the correct bit location */ >> bitmask <<= irq0; >> if ((msi_free_irq_bitmask[index] & bitmask) != bitmask) >> - panic("arch_teardown_msi_irq: Attempted to teardown MSI " >> - "interrupt (%d) not in use", irq); >> + panic("octeon_teardown_msi_irq: Attempted to teardown MSI " >> + "interrupt (%d) not in use", irq); > > And the second line here also needlessly changes the indentation. OK > > Thierry > -- Thanks! Yijing From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from szxga02-in.huawei.com (szxga02-in.huawei.com [119.145.14.65]) (using TLSv1 with cipher RC4-SHA (128/128 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id A66BE1A003D for ; Fri, 26 Sep 2014 12:13:40 +1000 (EST) Message-ID: <5424CB70.9020800@huawei.com> Date: Fri, 26 Sep 2014 10:12:00 +0800 From: Yijing Wang MIME-Version: 1.0 To: Thierry Reding Subject: Re: [PATCH v2 12/22] MIPS/Octeon/MSI: Use MSI chip framework to configure MSI/MSI-X irq References: <1411614872-4009-1-git-send-email-wangyijing@huawei.com> <1411614872-4009-13-git-send-email-wangyijing@huawei.com> <20140925073435.GJ12423@ulmo> In-Reply-To: <20140925073435.GJ12423@ulmo> Content-Type: text/plain; charset="ISO-8859-1" Cc: linux-mips@linux-mips.org, linux-ia64@vger.kernel.org, linux-pci@vger.kernel.org, Bharat.Bhushan@freescale.com, sparclinux@vger.kernel.org, linux-arch@vger.kernel.org, linux-s390@vger.kernel.org, Russell King , Joerg Roedel , x86@kernel.org, Sebastian Ott , xen-devel@lists.xenproject.org, arnab.basu@freescale.com, Arnd Bergmann , Konrad Rzeszutek Wilk , Chris Metcalf , Bjorn Helgaas , Thomas Gleixner , linux-arm-kernel@lists.infradead.org, Thomas Petazzoni , Xinwei Hu , Tony Luck , Sergei Shtylyov , linux-kernel@vger.kernel.org, Ralf Baechle , iommu@lists.linux-foundation.org, David Vrabel , Wuyun , linuxppc-dev@lists.ozlabs.org, "David S. Miller" , Lucas Stach List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , On 2014/9/25 15:34, Thierry Reding wrote: > On Thu, Sep 25, 2014 at 11:14:22AM +0800, Yijing Wang wrote: > [...] >> diff --git a/arch/mips/pci/msi-octeon.c b/arch/mips/pci/msi-octeon.c > [...] >> @@ -132,12 +132,12 @@ msi_irq_allocated: >> /* Make sure the search for available interrupts didn't fail */ >> if (irq >= 64) { >> if (request_private_bits) { >> - pr_err("arch_setup_msi_irq: Unable to find %d free interrupts, trying just one", >> + pr_err("octeon_setup_msi_irq: Unable to find %d free interrupts, trying just one", >> 1 << request_private_bits); > > Perhaps while at it make this (and other similar changes in this patch): > > pr_err("%s(): Unable to ...", __func__, ...); Will update it, thanks! > > So that it becomes more resilient against this kind of rename? > >> request_private_bits = 0; >> goto try_only_one; >> } else >> - panic("arch_setup_msi_irq: Unable to find a free MSI interrupt"); >> + panic("octeon_setup_msi_irq: Unable to find a free MSI interrupt"); > >> @@ -210,14 +210,13 @@ int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) >> >> return 0; >> } >> - > > This... OK > >> @@ -240,7 +239,7 @@ void arch_teardown_msi_irq(unsigned int irq) >> */ >> number_irqs = 0; >> while ((irq0 + number_irqs < 64) && >> - (msi_multiple_irq_bitmask[index] >> + (msi_multiple_irq_bitmask[index] > > ... and this seem like unrelated whitespace changes. OK > >> & (1ull << (irq0 + number_irqs)))) >> number_irqs++; >> number_irqs++; >> @@ -249,8 +248,8 @@ void arch_teardown_msi_irq(unsigned int irq) >> /* Shift the mask to the correct bit location */ >> bitmask <<= irq0; >> if ((msi_free_irq_bitmask[index] & bitmask) != bitmask) >> - panic("arch_teardown_msi_irq: Attempted to teardown MSI " >> - "interrupt (%d) not in use", irq); >> + panic("octeon_teardown_msi_irq: Attempted to teardown MSI " >> + "interrupt (%d) not in use", irq); > > And the second line here also needlessly changes the indentation. OK > > Thierry > -- Thanks! Yijing From mboxrd@z Thu Jan 1 00:00:00 1970 From: Yijing Wang Date: Fri, 26 Sep 2014 02:12:00 +0000 Subject: Re: [PATCH v2 12/22] MIPS/Octeon/MSI: Use MSI chip framework to configure MSI/MSI-X irq Message-Id: <5424CB70.9020800@huawei.com> List-Id: References: <1411614872-4009-1-git-send-email-wangyijing@huawei.com> <1411614872-4009-13-git-send-email-wangyijing@huawei.com> <20140925073435.GJ12423@ulmo> In-Reply-To: <20140925073435.GJ12423@ulmo> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: Thierry Reding Cc: Bjorn Helgaas , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Xinwei Hu , Wuyun , linux-arm-kernel@lists.infradead.org, Russell King , linux-arch@vger.kernel.org, arnab.basu@freescale.com, Bharat.Bhushan@freescale.com, x86@kernel.org, Arnd Bergmann , Thomas Gleixner , Konrad Rzeszutek Wilk , xen-devel@lists.xenproject.org, Joerg Roedel , iommu@lists.linux-foundation.org, linux-mips@linux-mips.org, Benjamin Herrenschmidt , linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org, Sebastian Ott , Tony Luck , linux-ia64@vger.kernel.org, "David S. Miller" , sparclinux@vger.ke On 2014/9/25 15:34, Thierry Reding wrote: > On Thu, Sep 25, 2014 at 11:14:22AM +0800, Yijing Wang wrote: > [...] >> diff --git a/arch/mips/pci/msi-octeon.c b/arch/mips/pci/msi-octeon.c > [...] >> @@ -132,12 +132,12 @@ msi_irq_allocated: >> /* Make sure the search for available interrupts didn't fail */ >> if (irq >= 64) { >> if (request_private_bits) { >> - pr_err("arch_setup_msi_irq: Unable to find %d free interrupts, trying just one", >> + pr_err("octeon_setup_msi_irq: Unable to find %d free interrupts, trying just one", >> 1 << request_private_bits); > > Perhaps while at it make this (and other similar changes in this patch): > > pr_err("%s(): Unable to ...", __func__, ...); Will update it, thanks! > > So that it becomes more resilient against this kind of rename? > >> request_private_bits = 0; >> goto try_only_one; >> } else >> - panic("arch_setup_msi_irq: Unable to find a free MSI interrupt"); >> + panic("octeon_setup_msi_irq: Unable to find a free MSI interrupt"); > >> @@ -210,14 +210,13 @@ int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) >> >> return 0; >> } >> - > > This... OK > >> @@ -240,7 +239,7 @@ void arch_teardown_msi_irq(unsigned int irq) >> */ >> number_irqs = 0; >> while ((irq0 + number_irqs < 64) && >> - (msi_multiple_irq_bitmask[index] >> + (msi_multiple_irq_bitmask[index] > > ... and this seem like unrelated whitespace changes. OK > >> & (1ull << (irq0 + number_irqs)))) >> number_irqs++; >> number_irqs++; >> @@ -249,8 +248,8 @@ void arch_teardown_msi_irq(unsigned int irq) >> /* Shift the mask to the correct bit location */ >> bitmask <<= irq0; >> if ((msi_free_irq_bitmask[index] & bitmask) != bitmask) >> - panic("arch_teardown_msi_irq: Attempted to teardown MSI " >> - "interrupt (%d) not in use", irq); >> + panic("octeon_teardown_msi_irq: Attempted to teardown MSI " >> + "interrupt (%d) not in use", irq); > > And the second line here also needlessly changes the indentation. OK > > Thierry > -- Thanks! Yijing From mboxrd@z Thu Jan 1 00:00:00 1970 From: wangyijing@huawei.com (Yijing Wang) Date: Fri, 26 Sep 2014 10:12:00 +0800 Subject: [PATCH v2 12/22] MIPS/Octeon/MSI: Use MSI chip framework to configure MSI/MSI-X irq In-Reply-To: <20140925073435.GJ12423@ulmo> References: <1411614872-4009-1-git-send-email-wangyijing@huawei.com> <1411614872-4009-13-git-send-email-wangyijing@huawei.com> <20140925073435.GJ12423@ulmo> Message-ID: <5424CB70.9020800@huawei.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On 2014/9/25 15:34, Thierry Reding wrote: > On Thu, Sep 25, 2014 at 11:14:22AM +0800, Yijing Wang wrote: > [...] >> diff --git a/arch/mips/pci/msi-octeon.c b/arch/mips/pci/msi-octeon.c > [...] >> @@ -132,12 +132,12 @@ msi_irq_allocated: >> /* Make sure the search for available interrupts didn't fail */ >> if (irq >= 64) { >> if (request_private_bits) { >> - pr_err("arch_setup_msi_irq: Unable to find %d free interrupts, trying just one", >> + pr_err("octeon_setup_msi_irq: Unable to find %d free interrupts, trying just one", >> 1 << request_private_bits); > > Perhaps while at it make this (and other similar changes in this patch): > > pr_err("%s(): Unable to ...", __func__, ...); Will update it, thanks! > > So that it becomes more resilient against this kind of rename? > >> request_private_bits = 0; >> goto try_only_one; >> } else >> - panic("arch_setup_msi_irq: Unable to find a free MSI interrupt"); >> + panic("octeon_setup_msi_irq: Unable to find a free MSI interrupt"); > >> @@ -210,14 +210,13 @@ int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) >> >> return 0; >> } >> - > > This... OK > >> @@ -240,7 +239,7 @@ void arch_teardown_msi_irq(unsigned int irq) >> */ >> number_irqs = 0; >> while ((irq0 + number_irqs < 64) && >> - (msi_multiple_irq_bitmask[index] >> + (msi_multiple_irq_bitmask[index] > > ... and this seem like unrelated whitespace changes. OK > >> & (1ull << (irq0 + number_irqs)))) >> number_irqs++; >> number_irqs++; >> @@ -249,8 +248,8 @@ void arch_teardown_msi_irq(unsigned int irq) >> /* Shift the mask to the correct bit location */ >> bitmask <<= irq0; >> if ((msi_free_irq_bitmask[index] & bitmask) != bitmask) >> - panic("arch_teardown_msi_irq: Attempted to teardown MSI " >> - "interrupt (%d) not in use", irq); >> + panic("octeon_teardown_msi_irq: Attempted to teardown MSI " >> + "interrupt (%d) not in use", irq); > > And the second line here also needlessly changes the indentation. OK > > Thierry > -- Thanks! Yijing