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diff for duplicates of <542505B3.7040208@huawei.com>

diff --git a/a/content_digest b/N1/content_digest
index 0eac153..7f457e1 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -33,7 +33,14 @@
   Tony Luck <tony.luck@intel.com>
   linux-ia64@vger.kernel.org
   David S. Miller <davem@davemloft.net>
- " sparclinux@vger.ke\0"
+  sparclinux@vger.kernel.org
+  Chris Metcalf <cmetcalf@tilera.com>
+  Ralf Baechle <ralf@linux-mips.org>
+  Lucas Stach <l.stach@pengutronix.de>
+  David Vrabel <david.vrabel@citrix.com>
+  Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+  Michael Ellerman <mpe@ellerman.id.au>
+ " Thomas Petazzoni <thomas.petazzoni@free-electrons.com>\0"
  "\00:1\0"
  "b\0"
  ">> The PCI core can already deal with that. An MSI chip can be set per bus\n"
@@ -106,4 +113,4 @@
  "Thanks!\n"
  Yijing
 
-66cbac25a9af6d7f8c34138a83b221c65482c2e05b5ff39e07ebf47d15a4d164
+4e82bb9d394ad7d4aa0be18a6cf69969a46fe33a3eb926cb9b5fa9abc7f0a516

diff --git a/a/content_digest b/N2/content_digest
index 0eac153..16bc149 100644
--- a/a/content_digest
+++ b/N2/content_digest
@@ -5,7 +5,7 @@
  "ref\020140925171612.GC31157@bart.dudau.co.uk\0"
  "From\0Yijing Wang <wangyijing@huawei.com>\0"
  "Subject\0Re: [PATCH v2 00/22] Use MSI chip framework to configure MSI/MSI-X in all platforms\0"
- "Date\0Fri, 26 Sep 2014 14:20:35 +0800\0"
+ "Date\0Fri, 26 Sep 2014 06:20:35 +0000\0"
  "To\0Liviu Dudau <liviu@dudau.co.uk>"
  " Thierry Reding <thierry.reding@gmail.com>\0"
  "Cc\0Bjorn Helgaas <bhelgaas@google.com>"
@@ -33,7 +33,14 @@
   Tony Luck <tony.luck@intel.com>
   linux-ia64@vger.kernel.org
   David S. Miller <davem@davemloft.net>
- " sparclinux@vger.ke\0"
+  sparclinux@vger.kernel.org
+  Chris Metcalf <cmetcalf@tilera.com>
+  Ralf Baechle <ralf@linux-mips.org>
+  Lucas Stach <l.stach@pengutronix.de>
+  David Vrabel <david.vrabel@citrix.com>
+  Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+  Michael Ellerman <mpe@ellerman.id.au>
+ " Thomas Petazzoni <thomas.petazzoni@free-electrons.com>\0"
  "\00:1\0"
  "b\0"
  ">> The PCI core can already deal with that. An MSI chip can be set per bus\n"
@@ -106,4 +113,4 @@
  "Thanks!\n"
  Yijing
 
-66cbac25a9af6d7f8c34138a83b221c65482c2e05b5ff39e07ebf47d15a4d164
+c17e74675a770883d5430913557aaacda0bd593847e6790cbe87351597a1ac06

diff --git a/a/content_digest b/N3/content_digest
index 0eac153..589d4c2 100644
--- a/a/content_digest
+++ b/N3/content_digest
@@ -9,31 +9,38 @@
  "To\0Liviu Dudau <liviu@dudau.co.uk>"
  " Thierry Reding <thierry.reding@gmail.com>\0"
  "Cc\0Bjorn Helgaas <bhelgaas@google.com>"
-  linux-pci@vger.kernel.org
-  linux-kernel@vger.kernel.org
+  <linux-pci@vger.kernel.org>
+  <linux-kernel@vger.kernel.org>
   Xinwei Hu <huxinwei@huawei.com>
   Wuyun <wuyun.wu@huawei.com>
-  linux-arm-kernel@lists.infradead.org
+  <linux-arm-kernel@lists.infradead.org>
   Russell King <linux@arm.linux.org.uk>
-  linux-arch@vger.kernel.org
-  arnab.basu@freescale.com
-  Bharat.Bhushan@freescale.com
-  x86@kernel.org
+  <linux-arch@vger.kernel.org>
+  <arnab.basu@freescale.com>
+  <Bharat.Bhushan@freescale.com>
+  <x86@kernel.org>
   Arnd Bergmann <arnd@arndb.de>
   Thomas Gleixner <tglx@linutronix.de>
   Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
-  xen-devel@lists.xenproject.org
+  <xen-devel@lists.xenproject.org>
   Joerg Roedel <joro@8bytes.org>
-  iommu@lists.linux-foundation.org
-  linux-mips@linux-mips.org
+  <iommu@lists.linux-foundation.org>
+  <linux-mips@linux-mips.org>
   Benjamin Herrenschmidt <benh@kernel.crashing.org>
-  linuxppc-dev@lists.ozlabs.org
-  linux-s390@vger.kernel.org
+  <linuxppc-dev@lists.ozlabs.org>
+  <linux-s390@vger.kernel.org>
   Sebastian Ott <sebott@linux.vnet.ibm.com>
   Tony Luck <tony.luck@intel.com>
-  linux-ia64@vger.kernel.org
+  <linux-ia64@vger.kernel.org>
   David S. Miller <davem@davemloft.net>
- " sparclinux@vger.ke\0"
+  <sparclinux@vger.kernel.org>
+  Chris Metcalf <cmetcalf@tilera.com>
+  Ralf Baechle <ralf@linux-mips.org>
+  Lucas Stach <l.stach@pengutronix.de>
+  David Vrabel <david.vrabel@citrix.com>
+  Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+  Michael Ellerman <mpe@ellerman.id.au>
+ " Thomas Petazzoni <thomas.petazzoni@free-electrons.com>\0"
  "\00:1\0"
  "b\0"
  ">> The PCI core can already deal with that. An MSI chip can be set per bus\n"
@@ -106,4 +113,4 @@
  "Thanks!\n"
  Yijing
 
-66cbac25a9af6d7f8c34138a83b221c65482c2e05b5ff39e07ebf47d15a4d164
+10522b8b276f45d3af0d51b3e507dac48ed74b0229a9b4c9473234de66a5f10d

diff --git a/a/content_digest b/N4/content_digest
index 0eac153..182aef0 100644
--- a/a/content_digest
+++ b/N4/content_digest
@@ -8,32 +8,37 @@
  "Date\0Fri, 26 Sep 2014 14:20:35 +0800\0"
  "To\0Liviu Dudau <liviu@dudau.co.uk>"
  " Thierry Reding <thierry.reding@gmail.com>\0"
- "Cc\0Bjorn Helgaas <bhelgaas@google.com>"
+ "Cc\0linux-mips@linux-mips.org"
+  linux-ia64@vger.kernel.org
   linux-pci@vger.kernel.org
-  linux-kernel@vger.kernel.org
-  Xinwei Hu <huxinwei@huawei.com>
-  Wuyun <wuyun.wu@huawei.com>
-  linux-arm-kernel@lists.infradead.org
-  Russell King <linux@arm.linux.org.uk>
-  linux-arch@vger.kernel.org
-  arnab.basu@freescale.com
   Bharat.Bhushan@freescale.com
+  sparclinux@vger.kernel.org
+  linux-arch@vger.kernel.org
+  linux-s390@vger.kernel.org
+  Russell King <linux@arm.linux.org.uk>
+  Joerg Roedel <joro@8bytes.org>
   x86@kernel.org
+  Sebastian Ott <sebott@linux.vnet.ibm.com>
+  xen-devel@lists.xenproject.org
+  arnab.basu@freescale.com
   Arnd Bergmann <arnd@arndb.de>
-  Thomas Gleixner <tglx@linutronix.de>
   Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
-  xen-devel@lists.xenproject.org
-  Joerg Roedel <joro@8bytes.org>
+  Chris Metcalf <cmetcalf@tilera.com>
+  Bjorn Helgaas <bhelgaas@google.com>
+  Thomas Gleixner <tglx@linutronix.de>
+  linux-arm-kernel@lists.infradead.org
+  Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
+  Xinwei Hu <huxinwei@huawei.com>
+  Tony Luck <tony.luck@intel.com>
+  Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+  linux-kernel@vger.kernel.org
+  Ralf Baechle <ralf@linux-mips.org>
   iommu@lists.linux-foundation.org
-  linux-mips@linux-mips.org
-  Benjamin Herrenschmidt <benh@kernel.crashing.org>
+  David Vrabel <david.vrabel@citrix.com>
+  Wuyun <wuyun.wu@huawei.com>
   linuxppc-dev@lists.ozlabs.org
-  linux-s390@vger.kernel.org
-  Sebastian Ott <sebott@linux.vnet.ibm.com>
-  Tony Luck <tony.luck@intel.com>
-  linux-ia64@vger.kernel.org
   David S. Miller <davem@davemloft.net>
- " sparclinux@vger.ke\0"
+ " Lucas Stach <l.stach@pengutronix.de>\0"
  "\00:1\0"
  "b\0"
  ">> The PCI core can already deal with that. An MSI chip can be set per bus\n"
@@ -106,4 +111,4 @@
  "Thanks!\n"
  Yijing
 
-66cbac25a9af6d7f8c34138a83b221c65482c2e05b5ff39e07ebf47d15a4d164
+be2ed59d6b99aa7c173acc41c0bd8025ea464a41a757a50d439e2cec719bbc3b

diff --git a/a/content_digest b/N5/content_digest
index 0eac153..dea219a 100644
--- a/a/content_digest
+++ b/N5/content_digest
@@ -5,7 +5,7 @@
  "ref\020140925171612.GC31157@bart.dudau.co.uk\0"
  "From\0Yijing Wang <wangyijing@huawei.com>\0"
  "Subject\0Re: [PATCH v2 00/22] Use MSI chip framework to configure MSI/MSI-X in all platforms\0"
- "Date\0Fri, 26 Sep 2014 14:20:35 +0800\0"
+ "Date\0Fri, 26 Sep 2014 06:20:35 +0000\0"
  "To\0Liviu Dudau <liviu@dudau.co.uk>"
  " Thierry Reding <thierry.reding@gmail.com>\0"
  "Cc\0Bjorn Helgaas <bhelgaas@google.com>"
@@ -106,4 +106,4 @@
  "Thanks!\n"
  Yijing
 
-66cbac25a9af6d7f8c34138a83b221c65482c2e05b5ff39e07ebf47d15a4d164
+781dafa06652a6cef2141470cc1dbfe1a98c2bb13daf49e7d8581aef9d7e8289

diff --git a/a/content_digest b/N6/content_digest
index 0eac153..01b42b1 100644
--- a/a/content_digest
+++ b/N6/content_digest
@@ -3,37 +3,10 @@
  "ref\020140925144855.GB31157@bart.dudau.co.uk\0"
  "ref\020140925164937.GB30382@ulmo\0"
  "ref\020140925171612.GC31157@bart.dudau.co.uk\0"
- "From\0Yijing Wang <wangyijing@huawei.com>\0"
- "Subject\0Re: [PATCH v2 00/22] Use MSI chip framework to configure MSI/MSI-X in all platforms\0"
+ "From\0wangyijing@huawei.com (Yijing Wang)\0"
+ "Subject\0[PATCH v2 00/22] Use MSI chip framework to configure MSI/MSI-X in all platforms\0"
  "Date\0Fri, 26 Sep 2014 14:20:35 +0800\0"
- "To\0Liviu Dudau <liviu@dudau.co.uk>"
- " Thierry Reding <thierry.reding@gmail.com>\0"
- "Cc\0Bjorn Helgaas <bhelgaas@google.com>"
-  linux-pci@vger.kernel.org
-  linux-kernel@vger.kernel.org
-  Xinwei Hu <huxinwei@huawei.com>
-  Wuyun <wuyun.wu@huawei.com>
-  linux-arm-kernel@lists.infradead.org
-  Russell King <linux@arm.linux.org.uk>
-  linux-arch@vger.kernel.org
-  arnab.basu@freescale.com
-  Bharat.Bhushan@freescale.com
-  x86@kernel.org
-  Arnd Bergmann <arnd@arndb.de>
-  Thomas Gleixner <tglx@linutronix.de>
-  Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
-  xen-devel@lists.xenproject.org
-  Joerg Roedel <joro@8bytes.org>
-  iommu@lists.linux-foundation.org
-  linux-mips@linux-mips.org
-  Benjamin Herrenschmidt <benh@kernel.crashing.org>
-  linuxppc-dev@lists.ozlabs.org
-  linux-s390@vger.kernel.org
-  Sebastian Ott <sebott@linux.vnet.ibm.com>
-  Tony Luck <tony.luck@intel.com>
-  linux-ia64@vger.kernel.org
-  David S. Miller <davem@davemloft.net>
- " sparclinux@vger.ke\0"
+ "To\0linux-arm-kernel@lists.infradead.org\0"
  "\00:1\0"
  "b\0"
  ">> The PCI core can already deal with that. An MSI chip can be set per bus\n"
@@ -106,4 +79,4 @@
  "Thanks!\n"
  Yijing
 
-66cbac25a9af6d7f8c34138a83b221c65482c2e05b5ff39e07ebf47d15a4d164
+3adf7d8f679ca8d4ed4697baa68c002b487432ef4e0ce0cd3101b60850cb60b7

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