From: Clint Taylor <clinton.a.taylor@intel.com>
To: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
Cc: Intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/i915/hdmi: Compute port_clock for 27.027 pixel replicated modes
Date: Fri, 26 Sep 2014 09:28:50 -0700 [thread overview]
Message-ID: <54259442.60307@intel.com> (raw)
In-Reply-To: <20140926155838.GA32511@intel.com>
On 09/26/2014 08:58 AM, Ville Syrjälä wrote:
> On Wed, Sep 24, 2014 at 03:49:39PM -0700, clinton.a.taylor@intel.com wrote:
>> From: Clint Taylor <clinton.a.taylor@intel.com>
>>
>> port_clock was being incorrectly computed and WRPLL was incorrectly
>> programmed for pixel doubled modes using a 27.027MHz pixel clock.
>> port_clock was set to 27.026 resulting in an output pixel clock
>> matching 27.000MHz.
>
> I don't understand how this 27.000MHz clock would come about. Can you
> explain further?
I didn't really drill down into the issue once I saw the WRPLL was being
computed differently for 480i@60 and the port clock was being passed as
27026.
>
>> Since there is no way to correctly half the 27.027
>> frequency as an integer just set port_clock to 27027 for these modes.
>>
>> Signed-off-by: Clint Taylor <clinton.a.taylor@intel.com>
>> ---
>> drivers/gpu/drm/i915/intel_hdmi.c | 5 +++++
>> 1 file changed, 5 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
>> index 29ec153..a0786d6 100644
>> --- a/drivers/gpu/drm/i915/intel_hdmi.c
>> +++ b/drivers/gpu/drm/i915/intel_hdmi.c
>> @@ -933,6 +933,11 @@ bool intel_hdmi_compute_config(struct intel_encoder *encoder,
>>
>> if (adjusted_mode->flags & DRM_MODE_FLAG_DBLCLK) {
>> pipe_config->pixel_multiplier = 2;
>> +
>> + /* Fix up port_clock since 27027 is not divisible by 2 */
>> + if (pipe_config->adjusted_mode.crtc_clock == 13513) {
>> + pipe_config->port_clock = 27027;
>> + }
>
> Ugh. Oh well I suppose we'll want to be as accurate as possible. Would
> be nice if would could someone do this fixup already in drm core, but
> that would probably require changing to smaller clock units all over
> the place which doesn't sound fun at all. So I guess we get to leave
> the kludge in the driver :(
I don't like using the 13MHz family in the mode table for this very
reason. Maybe I should revisit the pixel clock setting and computation
for pixel doubled modes in the i915 code.
>
> This also got me thinking about the 12bpc case as well. It's clearly
> busted with double clocked modes now. Care to fix that up as well?
What's the best way to enter into 12bpc mode? I tried to force the mode
in hdmi_compute_config(), but I wasn't able to get output.
>
> PS. did you ever send that separate patch to fix up the interlace
> flags in some of the double clocked modes? I don't remember seeing
> such a patch at least.
I had that on my TODO list and when I went to look at the modes (576i
@200Hz) they were already correct. Magic happens!!
-Clint
>
>> }
>>
>> if (intel_hdmi->color_range)
>> --
>> 1.7.9.5
>>
>> _______________________________________________
>> Intel-gfx mailing list
>> Intel-gfx@lists.freedesktop.org
>> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
next prev parent reply other threads:[~2014-09-26 16:29 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-09-24 22:49 [PATCH] drm/i915/hdmi: Compute port_clock for 27.027 pixel replicated modes clinton.a.taylor
2014-09-26 15:58 ` Ville Syrjälä
2014-09-26 16:28 ` Clint Taylor [this message]
2014-09-30 12:46 ` Ville Syrjälä
2014-10-06 23:17 ` Clint Taylor
2014-10-07 8:29 ` Ville Syrjälä
2014-10-08 9:36 ` Daniel Vetter
2014-09-26 16:40 ` Clint Taylor
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