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From: Michael Opdenacker <michael.opdenacker@free-electrons.com>
To: Randy Dunlap <rdunlap@infradead.org>,
	trivial@kernel.org, joe@perches.com, akpm@linux-foundation.org,
	arend@broadcom.com, gregkh@linuxfoundation.org
Cc: linux-kernel@vger.kernel.org,
	Michael Opdenacker <michael@free-electrons.com>
Subject: Re: [PATCH] [RESEND][TRIVIAL] treewide: fix occurrences of "the the "
Date: Thu, 02 Oct 2014 22:07:04 +0200	[thread overview]
Message-ID: <542DB068.3060803@free-electrons.com> (raw)
In-Reply-To: <542DAEE9.7000906@infradead.org>

On 10/02/2014 10:00 PM, Randy Dunlap wrote:
>> diff --git a/arch/xtensa/kernel/entry.S b/arch/xtensa/kernel/entry.S
>> index 82bbfa5a05b3..ccadbfd6645e 100644
>> --- a/arch/xtensa/kernel/entry.S
>> +++ b/arch/xtensa/kernel/entry.S
>> @@ -384,7 +384,7 @@ common_exception:
>>  	/* Save optional registers. */
>>  
>>  	save_xtregs_opt a1 a2 a4 a5 a6 a7 PT_XTREGS_OPT
>> -	
>> +
>>  #ifdef CONFIG_TRACE_IRQFLAGS
>>  	l32i	a4, a1, PT_DEPC
>>  	/* Double exception means we came here with an exception
>> @@ -433,7 +433,7 @@ common_exception_return:
>>  	 * We need to check some flags for signal handling and rescheduling,
>>  	 * and have to restore WB and WS, extra states, and all registers
>>  	 * in the register file that were in use in the user task.
>> -	 * Note that we don't disable interrupts here. 
>> +	 * Note that we don't disable interrupts here.
>>  	 */
>>  
>>  	_bbsi.l	a4, TIF_NEED_RESCHED, 3f
>> @@ -830,14 +830,14 @@ ENDPROC(unrecoverable_exception)
>>   * of the proper size instead.
>>   *
>>   * This algorithm simply backs out the register changes started by the user
>> - * excpetion handler, makes it appear that we have started a window underflow
>> + * exception handler, makes it appear that we have started a window underflow
>>   * by rotating the window back and then setting the old window base (OWB) in
>>   * the 'ps' register with the rolled back window base. The 'movsp' instruction
>>   * will be re-executed and this time since the next window frames is in the
>>   * active AR registers it won't cause an exception.
>>   *
>>   * If the WindowUnderflow code gets a TLB miss the page will get mapped
>> - * the the partial windeowUnderflow will be handeled in the double exception
>> + * and the partial windeowUnderflow will be handled in the double exception
>                       windowUnderflow

Great, new patch ready on the launch site!

Thanks,

Mike.

-- 
Michael Opdenacker, CEO, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
+33 484 258 098


  parent reply	other threads:[~2014-10-02 20:07 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-11-12  5:10 [PATCH] [RESEND][TRIVIAL] treewide: fix occurrences of "the the " Michael Opdenacker
2013-11-12  8:32 ` Arend van Spriel
2013-11-13  9:27   ` Michael Opdenacker
2013-12-09 10:36   ` [PATCH][RESEND] [TRIVIAL] " Michael Opdenacker
2014-03-05  5:52     ` [PATCH] [RESEND][TRIVIAL] " Michael Opdenacker
2014-03-05  5:55       ` Michael Opdenacker
2014-03-11 12:25         ` Michael Opdenacker
2014-03-11 12:30           ` Michael Opdenacker
2014-10-01  9:53       ` Michael Opdenacker
2014-10-01 13:32         ` Joe Perches
2014-10-01 19:49           ` Michael Opdenacker
2014-10-01 19:54             ` Michael Opdenacker
2014-10-02 17:25               ` Randy Dunlap
2014-10-02 19:18                 ` Michael Opdenacker
2014-10-02 19:24                   ` Michael Opdenacker
2014-10-02 20:00                     ` Randy Dunlap
2014-10-02 20:06                       ` Joe Perches
2014-10-02 20:11                         ` Michael Opdenacker
2014-10-02 20:13                           ` Michael Opdenacker
2014-10-02 20:15                             ` Michael Opdenacker
2014-10-02 22:37                               ` Eduardo Valentin
2014-10-16 12:35                                 ` Michael Opdenacker
2014-10-16 12:39                                   ` Michael Opdenacker
2014-10-16 19:38                                   ` Michael Opdenacker
2014-10-16 19:42                                     ` Michael Opdenacker
2015-03-27  1:55                                       ` Michael Opdenacker
2015-03-27  2:16                                         ` Michael Opdenacker
2015-03-27  9:34                                           ` Jiri Kosina
2015-04-20  4:55                                             ` Michael Opdenacker
2015-04-20  5:02                                               ` Michael Opdenacker
2015-03-27  2:23                                         ` Joe Perches
2015-03-27  2:52                                           ` Michael Opdenacker
2015-03-27  2:55                                             ` Michael Opdenacker
2014-10-02 20:07                       ` Michael Opdenacker [this message]
2014-10-02 20:07                   ` Michael Opdenacker

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