From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stephen Boyd Subject: Re: [PATCH v1] clk: qcom: Add support for regmap clock dividers Date: Fri, 03 Oct 2014 10:49:23 -0700 Message-ID: <542EE1A3.9050408@codeaurora.org> References: <1412097655-10662-1-git-send-email-gdjakov@mm-sol.com> <542D953F.3030701@codeaurora.org> <542EBCFE.9050602@mm-sol.com> Mime-Version: 1.0 Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Return-path: Received: from smtp.codeaurora.org ([198.145.11.231]:49736 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750987AbaJCRtY (ORCPT ); Fri, 3 Oct 2014 13:49:24 -0400 In-Reply-To: <542EBCFE.9050602@mm-sol.com> Sender: linux-arm-msm-owner@vger.kernel.org List-Id: linux-arm-msm@vger.kernel.org To: Georgi Djakov Cc: mturquette@linaro.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org On 10/03/14 08:13, Georgi Djakov wrote: > On 10/02/2014 09:11 PM, Stephen Boyd wrote: >> On 09/30/14 10:20, Georgi Djakov wrote: >> + unsigned long parent_rate) >> +{ >> + struct clk_regmap *rclk = to_clk_regmap(hw); >> + struct clkdiv_regmap *clkdiv = to_clkdiv_regmap(rclk); >> + unsigned int div, val; >> + >> + regmap_read(rclk->regmap, clkdiv->reg, &val); >> + if (!val) >> + return parent_rate; >> + >> + div = (val >> clkdiv->shift) & ((1 << clkdiv->width)-1); >> + >> + return parent_rate / div; >> I don't know if you saw the patch to split out the clk-divider.c logic >> from the readl/writel patch I sent[1]? That could make this slightly >> smaller. >> tabl > Could you please provide a link to that patch? Doh, here it is: https://lkml.org/lkml/2014/9/5/762 -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation