From: Aravind Gopalakrishnan <aravind.gopalakrishnan@amd.com>
To: Borislav Petkov <bp@alien8.de>
Cc: <slaoub@gmail.com>, Tony Luck <tony.luck@intel.com>,
"linux-edac@vger.kernel.org" <linux-edac@vger.kernel.org>,
LKML <linux-kernel@vger.kernel.org>
Subject: Re: Fwd: [PATCH] x86, MCE, AMD: save IA32_MCi_STATUS before machine_check_poll() resets it
Date: Thu, 9 Oct 2014 14:01:06 -0500 [thread overview]
Message-ID: <5436DB72.1090507@amd.com> (raw)
In-Reply-To: <20141009173529.GC17647@pd.tnic>
On 10/9/2014 12:35 PM, Borislav Petkov wrote:
> On Thu, Oct 09, 2014 at 11:53:39AM -0500, Aravind Gopalakrishnan wrote:
>> How do you mean "last error"?
>> The interrupt is only fired upon overflow..
> And? Think about it, what is causing the overflow? A CE, right?
>
> There was even a call to machine_check_poll() there which we removed,
> but for another reason. In any case, you should have the error signature
> in the MCA banks of the last error causing the overflow, right?
Right. I was not arguing that we shouldn't. Just wasn't clear on what
you meant.
Anyway, Thanks for clarifying.
> This is
> what I mean with last error.
>
> However(!),...
>
>> CE error if collected through polling gives proper decoding info. So,
>> why should this be any different for the same CE error for which an
>> interrupt is generated on crossing a threshold?
> ... we're currently using a special signature to signal the overflow
> with the K8_MCE_THRESHOLD_BASE thing. You simply report a special bank
> and this way you can tell userspace that this is an overflow error. I
> think that was the reason behind the software-defined banks.
>
> Now, we can also drop that and simply log a normal error but make sure
> MASK_OVERFLOW_HI is passed onto userspace so that it can see that the
> error is an overflow error. I.e., something like this:
>
> mce_setup(&m);
> // rdmsrl(MSR_IA32_MCG_STATUS, m.mcgstatus); - not sure about this one - we're not looking at MCGSTATUS for CEs
That's right. Might as well remove it.
> // rdmsrl(address, m.misc); - this MSR can be saved too as we're reading
> // the MISC register already.
> rdmsrl(MSR_IA32_MCx_STATUS(bank), m.status);
> m.bank = bank;
> mce_log(&m);
>
> so in the end it'll be something like this:
>
> mce_setup(&m);
> m.misc = (high << 32) | low;
> rdmsrl(MSR_IA32_MCx_STATUS(bank), m.status);
> m.bank = bank;
> mce_log(&m);
>
> so I'm still on the fence about what we want to do and am expecting
> arguments.
I actually agree with this approach. So no argument:)
> I like the last one more because it is simpler and tools
> don't need to know about the software-defined banks.
>
Thanks
-Aravind.
next prev parent reply other threads:[~2014-10-09 19:01 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-09-23 2:16 [PATCH] x86, MCE, AMD: use macros to compute bank MSRs Chen Yucong
2014-09-23 8:19 ` [PATCH] x86, MCE, AMD: save IA32_MCi_STATUS before machine_check_poll() resets it Chen Yucong
2014-09-28 8:15 ` Chen Yucong
2014-09-29 12:05 ` Borislav Petkov
2014-09-30 0:39 ` Chen Yucong
2014-09-30 7:25 ` Borislav Petkov
2014-09-30 9:56 ` Chen Yucong
2014-09-30 10:09 ` Borislav Petkov
2014-10-01 4:35 ` Chen Yucong
2014-10-02 13:12 ` Borislav Petkov
2014-10-02 14:37 ` Chen Yucong
[not found] ` <CAOjmkp9qQiTbqU3NUhUDAoQAa8wAPJnE_qXbDuBKrA3ee1_APQ@mail.gmail.com>
2014-10-08 21:52 ` Fwd: " Aravind Gopalakrishnan
2014-10-08 22:57 ` Borislav Petkov
2014-10-09 16:53 ` Aravind Gopalakrishnan
2014-10-09 17:35 ` Borislav Petkov
2014-10-09 19:01 ` Aravind Gopalakrishnan [this message]
2014-10-21 20:28 ` Borislav Petkov
2014-10-22 1:51 ` Chen Yucong
2014-10-22 8:16 ` Borislav Petkov
2014-10-22 8:53 ` Chen Yucong
2014-10-22 9:30 ` Borislav Petkov
2014-10-29 15:59 ` Aravind Gopalakrishnan
2014-10-30 19:04 ` Aravind Gopalakrishnan
2014-10-30 21:39 ` Borislav Petkov
2014-10-01 5:26 ` Chen Yucong
2014-10-01 10:10 ` Borislav Petkov
2014-09-28 8:09 ` [PATCH] x86, MCE, AMD: use macros to compute bank MSRs Chen Yucong
2014-09-29 11:48 ` Borislav Petkov
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