From mboxrd@z Thu Jan 1 00:00:00 1970 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 10 Oct 2014 01:10:28 +0200 (CEST) Received: from mailapp01.imgtec.com ([195.59.15.196]:62800 "EHLO mailapp01.imgtec.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S27011019AbaJIXK1MU4Hp (ORCPT ); Fri, 10 Oct 2014 01:10:27 +0200 Received: from KLMAIL01.kl.imgtec.org (unknown [192.168.5.35]) by Websense Email Security Gateway with ESMTPS id 6E0269F62B388; Fri, 10 Oct 2014 00:10:14 +0100 (IST) Received: from KLMAIL02.kl.imgtec.org (10.40.60.222) by KLMAIL01.kl.imgtec.org (192.168.5.35) with Microsoft SMTP Server (TLS) id 14.3.195.1; Fri, 10 Oct 2014 00:10:18 +0100 Received: from hhmail02.hh.imgtec.org (10.100.10.20) by klmail02.kl.imgtec.org (10.40.60.222) with Microsoft SMTP Server (TLS) id 14.3.195.1; Fri, 10 Oct 2014 00:10:18 +0100 Received: from BAMAIL02.ba.imgtec.org (10.20.40.28) by hhmail02.hh.imgtec.org (10.100.10.20) with Microsoft SMTP Server (TLS) id 14.3.195.1; Fri, 10 Oct 2014 00:10:18 +0100 Received: from [192.168.65.146] (192.168.65.146) by bamail02.ba.imgtec.org (10.20.40.28) with Microsoft SMTP Server (TLS) id 14.3.174.1; Thu, 9 Oct 2014 16:10:16 -0700 Message-ID: <543715D7.1020505@imgtec.com> Date: Thu, 9 Oct 2014 16:10:15 -0700 From: Leonid Yegoshin User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:17.0) Gecko/20130106 Thunderbird/17.0.2 MIME-Version: 1.0 To: James Hogan CC: , , , , , , , , , , , , , , , , , , , , , , , , Subject: Re: [PATCH v2 2/3] MIPS: Setup an instruction emulation in VDSO protected page instead of user stack References: <20141009195030.31230.58695.stgit@linux-yegoshin> <20141009200017.31230.69698.stgit@linux-yegoshin> <20141009224304.GA4818@jhogan-linux.le.imgtec.org> In-Reply-To: <20141009224304.GA4818@jhogan-linux.le.imgtec.org> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-Originating-IP: [192.168.65.146] Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 43178 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: Leonid.Yegoshin@imgtec.com Precedence: bulk List-help: List-unsubscribe: List-software: Ecartis version 1.0.0 List-Id: linux-mips X-List-ID: linux-mips List-subscribe: List-owner: List-post: List-archive: X-list: linux-mips >> Small stack of emulation blocks is supported because nested traps are possible >> in MIPS32/64 R6 emulation mix with FPU emulation. > Could you please clarify how this nesting of emulation blocks could > happen now that signals are handled more cleanly. > > I.e. isn't the emuframe stuff only required for instructions in branch > delay slots, and branches shouldn't be in branch delay slots anyway, so > I don't get how they could nest. > It may be a case for mix of FPU and MIPS R6 emulations. I just keep both emulators separate as much as possible but I assume that without prove it may be stackable - some rollback is needed to join both and it may (probably) cause a double emulation setup - dsemul may be called twice for the same pair of instructions. I didn't see that yet, honestly and you may be right. And as for signals - it is a different issue, some signal may happen before or after emulated instruction in emulation block and I see that. But I see it only before because of probability for it is a lot of higher. Unwinding is need because signal handler may not return but longjump to somewhere. From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailapp01.imgtec.com ([195.59.15.196]:62800 "EHLO mailapp01.imgtec.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S27011019AbaJIXK1MU4Hp (ORCPT ); Fri, 10 Oct 2014 01:10:27 +0200 Message-ID: <543715D7.1020505@imgtec.com> Date: Thu, 9 Oct 2014 16:10:15 -0700 From: Leonid Yegoshin MIME-Version: 1.0 Subject: Re: [PATCH v2 2/3] MIPS: Setup an instruction emulation in VDSO protected page instead of user stack References: <20141009195030.31230.58695.stgit@linux-yegoshin> <20141009200017.31230.69698.stgit@linux-yegoshin> <20141009224304.GA4818@jhogan-linux.le.imgtec.org> In-Reply-To: <20141009224304.GA4818@jhogan-linux.le.imgtec.org> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit Return-Path: Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org List-help: List-unsubscribe: List-software: Ecartis version 1.0.0 List-subscribe: List-owner: List-post: List-archive: To: James Hogan Cc: linux-mips@linux-mips.org, Zubair.Kakakhel@imgtec.com, geert+renesas@glider.be, david.daney@cavium.com, peterz@infradead.org, paul.gortmaker@windriver.com, davidlohr@hp.com, macro@linux-mips.org, chenhc@lemote.com, richard@nod.at, zajec5@gmail.com, keescook@chromium.org, alex@alex-smith.me.uk, tglx@linutronix.de, blogic@openwrt.org, jchandra@broadcom.com, paul.burton@imgtec.com, qais.yousef@imgtec.com, linux-kernel@vger.kernel.org, ralf@linux-mips.org, markos.chandras@imgtec.com, dengcheng.zhu@imgtec.com, manuel.lauss@gmail.com, akpm@linux-foundation.org, lars.persson@axis.com Message-ID: <20141009231015.fE5wh-WaODO04yl2HIxL_9bHC8bK92J9MsO35HgNPeI@z> >> Small stack of emulation blocks is supported because nested traps are possible >> in MIPS32/64 R6 emulation mix with FPU emulation. > Could you please clarify how this nesting of emulation blocks could > happen now that signals are handled more cleanly. > > I.e. isn't the emuframe stuff only required for instructions in branch > delay slots, and branches shouldn't be in branch delay slots anyway, so > I don't get how they could nest. > It may be a case for mix of FPU and MIPS R6 emulations. I just keep both emulators separate as much as possible but I assume that without prove it may be stackable - some rollback is needed to join both and it may (probably) cause a double emulation setup - dsemul may be called twice for the same pair of instructions. I didn't see that yet, honestly and you may be right. And as for signals - it is a different issue, some signal may happen before or after emulated instruction in emulation block and I see that. But I see it only before because of probability for it is a lot of higher. Unwinding is need because signal handler may not return but longjump to somewhere.