From: Julien Grall <julien.grall@linaro.org>
To: Jan Beulich <JBeulich@suse.com>,
xen-devel <xen-devel@lists.xenproject.org>
Cc: Ian Campbell <Ian.Campbell@eu.citrix.com>,
Suriyan Ramasami <suriyan.r@gmail.com>,
Stefano Stabellini <stefano.stabellini@citrix.com>,
Tim Deegan <tim@xen.org>
Subject: Re: [PATCH] arm32: fix build after 063188f4b3
Date: Fri, 10 Oct 2014 15:12:30 +0100 [thread overview]
Message-ID: <5437E94E.9010202@linaro.org> (raw)
In-Reply-To: <54380211020000780003DC42@mail.emea.novell.com>
Hi Jan,
On 10/10/2014 14:58, Jan Beulich wrote:
> "xen: arm: Add support for the Exynos secure firmware" introduced code
> assuming that exynos_smc() would get called with arguments in certain
> registers. While the "noinline" attribute guarantees the function to
> not get inlined, it does not guarantee that all arguments arrive in the
> assumed registers: gcc's interprocedural analysis can result in clone
> functions to be created where some of the incoming arguments (commonly
> when they have constant values) get replaced by putting in place the
> respective values inside the clone.
I'm not sure to understand here. If the function is marked as noinlined,
that would mean the arguments will be passed with the ARM in the
register with the ARM calling convention (i.e r0 for argument 0...). Why
GCC would try to create a clone of this function?
> The alternative of adding __attribute__((optimize("-fno-ipa-cp")))
> to the function definition would likely not work with all supported
> compiler versions.
The function was first introduced in arch/arm/psci.c (it's a copy of the
Linux one in arch/arm/kernel/psci.c).
Does it mean that Linux code is buggy too?
> Signed-off-by: Jan Beulich <jbeulich@suse.com>
>
> --- a/xen/arch/arm/platforms/exynos5.c
> +++ b/xen/arch/arm/platforms/exynos5.c
> @@ -40,6 +40,11 @@ static bool_t secure_firmware;
> static noinline void exynos_smc(register_t function_id, register_t arg0,
> register_t arg1, register_t arg2)
> {
> + register register_t fn_id asm("r0") = function_id;
> + register register_t a0 asm("r1") = arg0;
> + register register_t a1 asm("r2") = arg1;
> + register register_t a2 asm("r3") = arg2;
> +
> asm volatile(
> __asmeq("%0", "r0")
> __asmeq("%1", "r1")
> @@ -47,7 +52,7 @@ static noinline void exynos_smc(register
> __asmeq("%3", "r3")
> "smc #0"
> :
> - : "r" (function_id), "r" (arg0), "r" (arg1), "r" (arg2));
> + : "r" (fn_id), "r" (a0), "r" (a1), "r" (a2));
> }
This function is duplicate in 3 different places in Xen:
- arch/arm/psci.c
- arch/platforms/exynos5.c
- arch/platforms/seattle.c
So all those functions should be fixed. I think it's time to introduce a
global SMC function...
Regards,
--
Julien Grall
next prev parent reply other threads:[~2014-10-10 14:12 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-10-10 13:58 [PATCH] arm32: fix build after 063188f4b3 Jan Beulich
2014-10-10 14:12 ` Julien Grall [this message]
2014-10-10 14:51 ` Jan Beulich
2014-10-10 15:55 ` Julien Grall
2014-10-10 16:01 ` Ian Campbell
2014-10-10 16:14 ` Julien Grall
2014-10-10 16:33 ` Ian Campbell
2014-10-10 16:35 ` Ian Campbell
2014-10-10 16:18 ` Jan Beulich
2014-10-10 16:35 ` Julien Grall
2014-10-10 14:17 ` Ian Campbell
2014-10-10 14:32 ` Stefano Stabellini
2014-10-10 14:58 ` Jan Beulich
2014-10-10 17:03 ` Stefano Stabellini
2014-10-13 6:49 ` Jan Beulich
2014-10-13 9:40 ` Stefano Stabellini
2014-10-13 10:34 ` Jan Beulich
2014-10-10 14:54 ` Jan Beulich
2014-10-10 15:26 ` Ian Campbell
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