diff for duplicates of <543BC138.3010109@arm.com> diff --git a/a/1.txt b/N1/1.txt index ca05d74..16a1eb8 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -38,10 +38,3 @@ Thanks, M. -- Jazz is not dead. It just smells funny... --------------- next part -------------- -A non-text attachment was scrubbed... -Name: 0001-fixup-irqchip-gic-Support-hierarchy-irq-domain.patch -Type: text/x-diff -Size: 3710 bytes -Desc: not available -URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20141013/af3ac3cf/attachment.bin> diff --git a/N1/2.hdr b/N1/2.hdr new file mode 100644 index 0000000..b60be50 --- /dev/null +++ b/N1/2.hdr @@ -0,0 +1,5 @@ +Content-Type: text/x-diff; + name=0001-fixup-irqchip-gic-Support-hierarchy-irq-domain.patch +Content-Transfer-Encoding: quoted-printable +Content-Disposition: inline; + filename*0="0001-fixup-irqchip-gic-Support-hierarchy-irq-domain.patch" diff --git a/N1/2.txt b/N1/2.txt new file mode 100644 index 0000000..ecb739f --- /dev/null +++ b/N1/2.txt @@ -0,0 +1,118 @@ +>From 97d4ea1f0922fb47dd1b09cd2694b7fa5b519db9 Mon Sep 17 00:00:00 2001 +From: Marc Zyngier <marc.zyngier@arm.com> +Date: Mon, 13 Oct 2014 10:57:28 +0100 +Subject: [PATCH] fixup! irqchip: gic: Support hierarchy irq domain. + +--- + drivers/irqchip/Kconfig | 1 + + drivers/irqchip/irq-gic.c | 53 ++++++++++++++++++++++------------------------- + 2 files changed, 26 insertions(+), 28 deletions(-) + +diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig +index b8632bf..2a48e0a 100644 +--- a/drivers/irqchip/Kconfig ++++ b/drivers/irqchip/Kconfig +@@ -5,6 +5,7 @@ config IRQCHIP + config ARM_GIC + bool + select IRQ_DOMAIN ++ select IRQ_DOMAIN_HIERARCHY + select MULTI_IRQ_HANDLER + + config GIC_NON_BANKED +diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c +index 17f5aa6..a99c211 100644 +--- a/drivers/irqchip/irq-gic.c ++++ b/drivers/irqchip/irq-gic.c +@@ -835,8 +835,6 @@ static struct notifier_block gic_cpu_notifier = { + }; + #endif + +- +-#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY + static int gic_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, + unsigned int nr_irqs, void *arg) + { +@@ -870,10 +868,8 @@ static void gic_irq_domain_free(struct irq_domain *domain, unsigned int virq, + static const struct irq_domain_ops gic_irq_domain_hierarchy_ops = { + .alloc = gic_irq_domain_alloc, + .free = gic_irq_domain_free, ++ .xlate = gic_irq_domain_xlate, + }; +-#else +-#define gic_irq_domain_hierarchy_ops 0 +-#endif /* CONFIG_IRQ_DOMAIN_HIERARCHY */ + + static const struct irq_domain_ops gic_irq_domain_ops = { + .map = gic_irq_domain_map, +@@ -965,18 +961,6 @@ void __init gic_init_bases(unsigned int gic_nr, int irq_start, + gic_cpu_map[i] = 0xff; + + /* +- * For primary GICs, skip over SGIs. +- * For secondary GICs, skip over PPIs, too. +- */ +- if (gic_nr == 0 && (irq_start & 31) > 0) { +- hwirq_base = 16; +- if (irq_start != -1) +- irq_start = (irq_start & ~31) + 16; +- } else { +- hwirq_base = 32; +- } +- +- /* + * Find out how many interrupts are supported. + * The GIC only supports up to 1020 interrupt sources. + */ +@@ -986,14 +970,31 @@ void __init gic_init_bases(unsigned int gic_nr, int irq_start, + gic_irqs = 1020; + gic->gic_irqs = gic_irqs; + +- gic_irqs -= hwirq_base; /* calculate # of irqs to allocate */ ++ if (node) { /* DT case */ ++ const struct irq_domain_ops *ops = &gic_irq_domain_hierarchy_ops; ++ ++ if (!of_property_read_u32(node, "arm,routable-irqs", ++ &nr_routable_irqs)) { ++ ops = &gic_irq_domain_ops; ++ gic_irqs = nr_routable_irqs; ++ } ++ ++ gic->domain = irq_domain_add_linear(node, gic_irqs, ops, gic); ++ } else { /* Non-DT case */ ++ /* ++ * For primary GICs, skip over SGIs. ++ * For secondary GICs, skip over PPIs, too. ++ */ ++ if (gic_nr == 0 && (irq_start & 31) > 0) { ++ hwirq_base = 16; ++ if (irq_start != -1) ++ irq_start = (irq_start & ~31) + 16; ++ } else { ++ hwirq_base = 32; ++ } ++ ++ gic_irqs -= hwirq_base; /* calculate # of irqs to allocate */ + +- if (IS_ENABLED(CONFIG_IRQ_DOMAIN_HIERARCHY) && +- of_find_property(node, "arm,irq-domain-hierarchy", NULL)) +- gic->domain = irq_domain_add_linear(node, gic_irqs, +- &gic_irq_domain_hierarchy_ops, gic); +- else if (of_property_read_u32(node, "arm,routable-irqs", +- &nr_routable_irqs)) { + irq_base = irq_alloc_descs(irq_start, 16, gic_irqs, + numa_node_id()); + if (IS_ERR_VALUE(irq_base)) { +@@ -1004,10 +1005,6 @@ void __init gic_init_bases(unsigned int gic_nr, int irq_start, + + gic->domain = irq_domain_add_legacy(node, gic_irqs, irq_base, + hwirq_base, &gic_irq_domain_ops, gic); +- } else { +- gic->domain = irq_domain_add_linear(node, nr_routable_irqs, +- &gic_irq_domain_ops, +- gic); + } + + if (WARN_ON(!gic->domain)) +-- +2.0.4 diff --git a/a/content_digest b/N1/content_digest index 8d26e98..3cf34b1 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -2,11 +2,31 @@ "ref\01412864980-20273-4-git-send-email-yingjoe.chen@mediatek.com\0" "ref\05436BF0C.1030508@arm.com\0" "ref\01413196996.23455.9.camel@mtksdaap41\0" - "From\0marc.zyngier@arm.com (Marc Zyngier)\0" - "Subject\0[PATCH v3 3/7] irqchip: gic: Support hierarchy irq domain.\0" + "From\0Marc Zyngier <marc.zyngier@arm.com>\0" + "Subject\0Re: [PATCH v3 3/7] irqchip: gic: Support hierarchy irq domain.\0" "Date\0Mon, 13 Oct 2014 13:10:32 +0100\0" - "To\0linux-arm-kernel@lists.infradead.org\0" - "\00:1\0" + "To\0Joe.C <yingjoe.chen@mediatek.com>\0" + "Cc\0Mark Rutland <Mark.Rutland@arm.com>" + arm@kernel.org <arm@kernel.org> + Rob Herring <robh+dt@kernel.org> + Thomas Gleixner <tglx@linutronix.de> + Jiang Liu <jiang.liu@linux.intel.com> + linux-arm-kernel@lists.infradead.org <linux-arm-kernel@lists.infradead.org> + srv_heupstream@mediatek.com <srv_heupstream@mediatek.com> + yingjoe.chen@gmail.com <yingjoe.chen@gmail.com> + hc.yen@mediatek.com <hc.yen@mediatek.com> + eddie.huang@mediatek.com <eddie.huang@mediatek.com> + nathan.chung@mediatek.com <nathan.chung@mediatek.com> + yh.chen@mediatek.com <yh.chen@mediatek.com> + Sascha Hauer <kernel@pengutronix.de> + Olof Johansson <olof@lixom.net> + Arnd Bergmann <arnd@arndb.de> + Pawel Moll <Pawel.Moll@arm.com> + Russell King <linux@arm.linux.org.uk> + Jason Cooper <jason@lakedaemon.net> + Benjamin Herrenschmidt <benh@kernel.crashing.org> + " Santosh Shilimkar <santosh.shilimkar>\0" + "\01:1\0" "b\0" "On 13/10/14 11:43, Joe.C wrote:\n" "> On Thu, 2014-10-09 at 17:59 +0100, Marc Zyngier wrote:\n" @@ -47,13 +67,127 @@ "\n" "\tM.\n" "-- \n" - "Jazz is not dead. It just smells funny...\n" - "-------------- next part --------------\n" - "A non-text attachment was scrubbed...\n" - "Name: 0001-fixup-irqchip-gic-Support-hierarchy-irq-domain.patch\n" - "Type: text/x-diff\n" - "Size: 3710 bytes\n" - "Desc: not available\n" - URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20141013/af3ac3cf/attachment.bin> + Jazz is not dead. It just smells funny... + "\01:2\0" + "fn\00001-fixup-irqchip-gic-Support-hierarchy-irq-domain.patch\0" + "b\0" + ">From 97d4ea1f0922fb47dd1b09cd2694b7fa5b519db9 Mon Sep 17 00:00:00 2001\n" + "From: Marc Zyngier <marc.zyngier@arm.com>\n" + "Date: Mon, 13 Oct 2014 10:57:28 +0100\n" + "Subject: [PATCH] fixup! irqchip: gic: Support hierarchy irq domain.\n" + "\n" + "---\n" + " drivers/irqchip/Kconfig | 1 +\n" + " drivers/irqchip/irq-gic.c | 53 ++++++++++++++++++++++-------------------------\n" + " 2 files changed, 26 insertions(+), 28 deletions(-)\n" + "\n" + "diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig\n" + "index b8632bf..2a48e0a 100644\n" + "--- a/drivers/irqchip/Kconfig\n" + "+++ b/drivers/irqchip/Kconfig\n" + "@@ -5,6 +5,7 @@ config IRQCHIP\n" + " config ARM_GIC\n" + " \tbool\n" + " \tselect IRQ_DOMAIN\n" + "+\tselect IRQ_DOMAIN_HIERARCHY\n" + " \tselect MULTI_IRQ_HANDLER\n" + " \n" + " config GIC_NON_BANKED\n" + "diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c\n" + "index 17f5aa6..a99c211 100644\n" + "--- a/drivers/irqchip/irq-gic.c\n" + "+++ b/drivers/irqchip/irq-gic.c\n" + "@@ -835,8 +835,6 @@ static struct notifier_block gic_cpu_notifier = {\n" + " };\n" + " #endif\n" + " \n" + "-\n" + "-#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY\n" + " static int gic_irq_domain_alloc(struct irq_domain *domain, unsigned int virq,\n" + " \t\t\t\tunsigned int nr_irqs, void *arg)\n" + " {\n" + "@@ -870,10 +868,8 @@ static void gic_irq_domain_free(struct irq_domain *domain, unsigned int virq,\n" + " static const struct irq_domain_ops gic_irq_domain_hierarchy_ops = {\n" + " \t.alloc = gic_irq_domain_alloc,\n" + " \t.free = gic_irq_domain_free,\n" + "+\t.xlate = gic_irq_domain_xlate,\n" + " };\n" + "-#else\n" + "-#define gic_irq_domain_hierarchy_ops 0\n" + "-#endif /* CONFIG_IRQ_DOMAIN_HIERARCHY */\n" + " \n" + " static const struct irq_domain_ops gic_irq_domain_ops = {\n" + " \t.map = gic_irq_domain_map,\n" + "@@ -965,18 +961,6 @@ void __init gic_init_bases(unsigned int gic_nr, int irq_start,\n" + " \t\tgic_cpu_map[i] = 0xff;\n" + " \n" + " \t/*\n" + "-\t * For primary GICs, skip over SGIs.\n" + "-\t * For secondary GICs, skip over PPIs, too.\n" + "-\t */\n" + "-\tif (gic_nr == 0 && (irq_start & 31) > 0) {\n" + "-\t\thwirq_base = 16;\n" + "-\t\tif (irq_start != -1)\n" + "-\t\t\tirq_start = (irq_start & ~31) + 16;\n" + "-\t} else {\n" + "-\t\thwirq_base = 32;\n" + "-\t}\n" + "-\n" + "-\t/*\n" + " \t * Find out how many interrupts are supported.\n" + " \t * The GIC only supports up to 1020 interrupt sources.\n" + " \t */\n" + "@@ -986,14 +970,31 @@ void __init gic_init_bases(unsigned int gic_nr, int irq_start,\n" + " \t\tgic_irqs = 1020;\n" + " \tgic->gic_irqs = gic_irqs;\n" + " \n" + "-\tgic_irqs -= hwirq_base; /* calculate # of irqs to allocate */\n" + "+\tif (node) {\t\t/* DT case */\n" + "+\t\tconst struct irq_domain_ops *ops = &gic_irq_domain_hierarchy_ops;\n" + "+\n" + "+\t\tif (!of_property_read_u32(node, \"arm,routable-irqs\",\n" + "+\t\t\t\t\t &nr_routable_irqs)) {\n" + "+\t\t\tops = &gic_irq_domain_ops;\n" + "+\t\t\tgic_irqs = nr_routable_irqs;\n" + "+\t\t}\n" + "+\n" + "+\t\tgic->domain = irq_domain_add_linear(node, gic_irqs, ops, gic);\n" + "+\t} else {\t\t/* Non-DT case */\n" + "+\t\t/*\n" + "+\t\t * For primary GICs, skip over SGIs.\n" + "+\t\t * For secondary GICs, skip over PPIs, too.\n" + "+\t\t */\n" + "+\t\tif (gic_nr == 0 && (irq_start & 31) > 0) {\n" + "+\t\t\thwirq_base = 16;\n" + "+\t\t\tif (irq_start != -1)\n" + "+\t\t\t\tirq_start = (irq_start & ~31) + 16;\n" + "+\t\t} else {\n" + "+\t\t\thwirq_base = 32;\n" + "+\t\t}\n" + "+\n" + "+\t\tgic_irqs -= hwirq_base; /* calculate # of irqs to allocate */\n" + " \n" + "-\tif (IS_ENABLED(CONFIG_IRQ_DOMAIN_HIERARCHY) &&\n" + "-\t\tof_find_property(node, \"arm,irq-domain-hierarchy\", NULL))\n" + "-\t\tgic->domain = irq_domain_add_linear(node, gic_irqs,\n" + "-\t\t\t\t\t&gic_irq_domain_hierarchy_ops, gic);\n" + "-\telse if (of_property_read_u32(node, \"arm,routable-irqs\",\n" + "-\t\t\t\t &nr_routable_irqs)) {\n" + " \t\tirq_base = irq_alloc_descs(irq_start, 16, gic_irqs,\n" + " \t\t\t\t\t numa_node_id());\n" + " \t\tif (IS_ERR_VALUE(irq_base)) {\n" + "@@ -1004,10 +1005,6 @@ void __init gic_init_bases(unsigned int gic_nr, int irq_start,\n" + " \n" + " \t\tgic->domain = irq_domain_add_legacy(node, gic_irqs, irq_base,\n" + " \t\t\t\t\thwirq_base, &gic_irq_domain_ops, gic);\n" + "-\t} else {\n" + "-\t\tgic->domain = irq_domain_add_linear(node, nr_routable_irqs,\n" + "-\t\t\t\t\t\t &gic_irq_domain_ops,\n" + "-\t\t\t\t\t\t gic);\n" + " \t}\n" + " \n" + " \tif (WARN_ON(!gic->domain))\n" + "-- \n" + 2.0.4 -eb92ed7050437f29c3ded314c1ab7f3894f5c4e0c57e8fdae73f09be5f2eaa31 +62f5133b58953b4047b45d6fc6938034cd8fc98ca0ec1a91308be235ad114c0c
diff --git a/a/1.txt b/N2/1.txt index ca05d74..16a1eb8 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -38,10 +38,3 @@ Thanks, M. -- Jazz is not dead. It just smells funny... --------------- next part -------------- -A non-text attachment was scrubbed... -Name: 0001-fixup-irqchip-gic-Support-hierarchy-irq-domain.patch -Type: text/x-diff -Size: 3710 bytes -Desc: not available -URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20141013/af3ac3cf/attachment.bin> diff --git a/N2/2.hdr b/N2/2.hdr new file mode 100644 index 0000000..2f83a1d --- /dev/null +++ b/N2/2.hdr @@ -0,0 +1,5 @@ +Content-Type: text/x-diff; + name=0001-fixup-irqchip-gic-Support-hierarchy-irq-domain.patch +Content-Transfer-Encoding: quoted-printable +Content-Disposition: inline; + filename*0="0001-fixup-irqchip-gic-Support-hierarchy-irq-domain.patch" diff --git a/N2/2.txt b/N2/2.txt new file mode 100644 index 0000000..ecb739f --- /dev/null +++ b/N2/2.txt @@ -0,0 +1,118 @@ +>From 97d4ea1f0922fb47dd1b09cd2694b7fa5b519db9 Mon Sep 17 00:00:00 2001 +From: Marc Zyngier <marc.zyngier@arm.com> +Date: Mon, 13 Oct 2014 10:57:28 +0100 +Subject: [PATCH] fixup! irqchip: gic: Support hierarchy irq domain. + +--- + drivers/irqchip/Kconfig | 1 + + drivers/irqchip/irq-gic.c | 53 ++++++++++++++++++++++------------------------- + 2 files changed, 26 insertions(+), 28 deletions(-) + +diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig +index b8632bf..2a48e0a 100644 +--- a/drivers/irqchip/Kconfig ++++ b/drivers/irqchip/Kconfig +@@ -5,6 +5,7 @@ config IRQCHIP + config ARM_GIC + bool + select IRQ_DOMAIN ++ select IRQ_DOMAIN_HIERARCHY + select MULTI_IRQ_HANDLER + + config GIC_NON_BANKED +diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c +index 17f5aa6..a99c211 100644 +--- a/drivers/irqchip/irq-gic.c ++++ b/drivers/irqchip/irq-gic.c +@@ -835,8 +835,6 @@ static struct notifier_block gic_cpu_notifier = { + }; + #endif + +- +-#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY + static int gic_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, + unsigned int nr_irqs, void *arg) + { +@@ -870,10 +868,8 @@ static void gic_irq_domain_free(struct irq_domain *domain, unsigned int virq, + static const struct irq_domain_ops gic_irq_domain_hierarchy_ops = { + .alloc = gic_irq_domain_alloc, + .free = gic_irq_domain_free, ++ .xlate = gic_irq_domain_xlate, + }; +-#else +-#define gic_irq_domain_hierarchy_ops 0 +-#endif /* CONFIG_IRQ_DOMAIN_HIERARCHY */ + + static const struct irq_domain_ops gic_irq_domain_ops = { + .map = gic_irq_domain_map, +@@ -965,18 +961,6 @@ void __init gic_init_bases(unsigned int gic_nr, int irq_start, + gic_cpu_map[i] = 0xff; + + /* +- * For primary GICs, skip over SGIs. +- * For secondary GICs, skip over PPIs, too. +- */ +- if (gic_nr == 0 && (irq_start & 31) > 0) { +- hwirq_base = 16; +- if (irq_start != -1) +- irq_start = (irq_start & ~31) + 16; +- } else { +- hwirq_base = 32; +- } +- +- /* + * Find out how many interrupts are supported. + * The GIC only supports up to 1020 interrupt sources. + */ +@@ -986,14 +970,31 @@ void __init gic_init_bases(unsigned int gic_nr, int irq_start, + gic_irqs = 1020; + gic->gic_irqs = gic_irqs; + +- gic_irqs -= hwirq_base; /* calculate # of irqs to allocate */ ++ if (node) { /* DT case */ ++ const struct irq_domain_ops *ops = &gic_irq_domain_hierarchy_ops; ++ ++ if (!of_property_read_u32(node, "arm,routable-irqs", ++ &nr_routable_irqs)) { ++ ops = &gic_irq_domain_ops; ++ gic_irqs = nr_routable_irqs; ++ } ++ ++ gic->domain = irq_domain_add_linear(node, gic_irqs, ops, gic); ++ } else { /* Non-DT case */ ++ /* ++ * For primary GICs, skip over SGIs. ++ * For secondary GICs, skip over PPIs, too. ++ */ ++ if (gic_nr == 0 && (irq_start & 31) > 0) { ++ hwirq_base = 16; ++ if (irq_start != -1) ++ irq_start = (irq_start & ~31) + 16; ++ } else { ++ hwirq_base = 32; ++ } ++ ++ gic_irqs -= hwirq_base; /* calculate # of irqs to allocate */ + +- if (IS_ENABLED(CONFIG_IRQ_DOMAIN_HIERARCHY) && +- of_find_property(node, "arm,irq-domain-hierarchy", NULL)) +- gic->domain = irq_domain_add_linear(node, gic_irqs, +- &gic_irq_domain_hierarchy_ops, gic); +- else if (of_property_read_u32(node, "arm,routable-irqs", +- &nr_routable_irqs)) { + irq_base = irq_alloc_descs(irq_start, 16, gic_irqs, + numa_node_id()); + if (IS_ERR_VALUE(irq_base)) { +@@ -1004,10 +1005,6 @@ void __init gic_init_bases(unsigned int gic_nr, int irq_start, + + gic->domain = irq_domain_add_legacy(node, gic_irqs, irq_base, + hwirq_base, &gic_irq_domain_ops, gic); +- } else { +- gic->domain = irq_domain_add_linear(node, nr_routable_irqs, +- &gic_irq_domain_ops, +- gic); + } + + if (WARN_ON(!gic->domain)) +-- +2.0.4 diff --git a/a/content_digest b/N2/content_digest index 8d26e98..37e532c 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -2,11 +2,39 @@ "ref\01412864980-20273-4-git-send-email-yingjoe.chen@mediatek.com\0" "ref\05436BF0C.1030508@arm.com\0" "ref\01413196996.23455.9.camel@mtksdaap41\0" - "From\0marc.zyngier@arm.com (Marc Zyngier)\0" - "Subject\0[PATCH v3 3/7] irqchip: gic: Support hierarchy irq domain.\0" + "From\0Marc Zyngier <marc.zyngier@arm.com>\0" + "Subject\0Re: [PATCH v3 3/7] irqchip: gic: Support hierarchy irq domain.\0" "Date\0Mon, 13 Oct 2014 13:10:32 +0100\0" - "To\0linux-arm-kernel@lists.infradead.org\0" - "\00:1\0" + "To\0Joe.C <yingjoe.chen@mediatek.com>\0" + "Cc\0Mark Rutland <Mark.Rutland@arm.com>" + arm@kernel.org <arm@kernel.org> + Rob Herring <robh+dt@kernel.org> + Thomas Gleixner <tglx@linutronix.de> + Jiang Liu <jiang.liu@linux.intel.com> + linux-arm-kernel@lists.infradead.org <linux-arm-kernel@lists.infradead.org> + srv_heupstream@mediatek.com <srv_heupstream@mediatek.com> + yingjoe.chen@gmail.com <yingjoe.chen@gmail.com> + hc.yen@mediatek.com <hc.yen@mediatek.com> + eddie.huang@mediatek.com <eddie.huang@mediatek.com> + nathan.chung@mediatek.com <nathan.chung@mediatek.com> + yh.chen@mediatek.com <yh.chen@mediatek.com> + Sascha Hauer <kernel@pengutronix.de> + Olof Johansson <olof@lixom.net> + Arnd Bergmann <arnd@arndb.de> + Pawel Moll <Pawel.Moll@arm.com> + Russell King <linux@arm.linux.org.uk> + Jason Cooper <jason@lakedaemon.net> + Benjamin Herrenschmidt <benh@kernel.crashing.org> + Santosh Shilimkar <santosh.shilimkar@ti.com> + Matt Porter <mporter@linaro.org> + Marc Carino <marc.ceeeee@gmail.com> + Florian Fainelli <f.fainelli@gmail.com> + Sricharan R <r.sricharan@ti.com> + Matthias Brugger <matthias.bgg@gmail.com> + grant.likely@linaro.org <grant.likely@linaro.org> + devicetree@vger.kernel.org <devicetree@vger.kernel.org> + " linux-kernel@vger.kernel.org <linux-kernel@vger.kernel.org>\0" + "\01:1\0" "b\0" "On 13/10/14 11:43, Joe.C wrote:\n" "> On Thu, 2014-10-09 at 17:59 +0100, Marc Zyngier wrote:\n" @@ -47,13 +75,127 @@ "\n" "\tM.\n" "-- \n" - "Jazz is not dead. It just smells funny...\n" - "-------------- next part --------------\n" - "A non-text attachment was scrubbed...\n" - "Name: 0001-fixup-irqchip-gic-Support-hierarchy-irq-domain.patch\n" - "Type: text/x-diff\n" - "Size: 3710 bytes\n" - "Desc: not available\n" - URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20141013/af3ac3cf/attachment.bin> + Jazz is not dead. It just smells funny... + "\01:2\0" + "fn\00001-fixup-irqchip-gic-Support-hierarchy-irq-domain.patch\0" + "b\0" + ">From 97d4ea1f0922fb47dd1b09cd2694b7fa5b519db9 Mon Sep 17 00:00:00 2001\n" + "From: Marc Zyngier <marc.zyngier@arm.com>\n" + "Date: Mon, 13 Oct 2014 10:57:28 +0100\n" + "Subject: [PATCH] fixup! irqchip: gic: Support hierarchy irq domain.\n" + "\n" + "---\n" + " drivers/irqchip/Kconfig | 1 +\n" + " drivers/irqchip/irq-gic.c | 53 ++++++++++++++++++++++-------------------------\n" + " 2 files changed, 26 insertions(+), 28 deletions(-)\n" + "\n" + "diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig\n" + "index b8632bf..2a48e0a 100644\n" + "--- a/drivers/irqchip/Kconfig\n" + "+++ b/drivers/irqchip/Kconfig\n" + "@@ -5,6 +5,7 @@ config IRQCHIP\n" + " config ARM_GIC\n" + " \tbool\n" + " \tselect IRQ_DOMAIN\n" + "+\tselect IRQ_DOMAIN_HIERARCHY\n" + " \tselect MULTI_IRQ_HANDLER\n" + " \n" + " config GIC_NON_BANKED\n" + "diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c\n" + "index 17f5aa6..a99c211 100644\n" + "--- a/drivers/irqchip/irq-gic.c\n" + "+++ b/drivers/irqchip/irq-gic.c\n" + "@@ -835,8 +835,6 @@ static struct notifier_block gic_cpu_notifier = {\n" + " };\n" + " #endif\n" + " \n" + "-\n" + "-#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY\n" + " static int gic_irq_domain_alloc(struct irq_domain *domain, unsigned int virq,\n" + " \t\t\t\tunsigned int nr_irqs, void *arg)\n" + " {\n" + "@@ -870,10 +868,8 @@ static void gic_irq_domain_free(struct irq_domain *domain, unsigned int virq,\n" + " static const struct irq_domain_ops gic_irq_domain_hierarchy_ops = {\n" + " \t.alloc = gic_irq_domain_alloc,\n" + " \t.free = gic_irq_domain_free,\n" + "+\t.xlate = gic_irq_domain_xlate,\n" + " };\n" + "-#else\n" + "-#define gic_irq_domain_hierarchy_ops 0\n" + "-#endif /* CONFIG_IRQ_DOMAIN_HIERARCHY */\n" + " \n" + " static const struct irq_domain_ops gic_irq_domain_ops = {\n" + " \t.map = gic_irq_domain_map,\n" + "@@ -965,18 +961,6 @@ void __init gic_init_bases(unsigned int gic_nr, int irq_start,\n" + " \t\tgic_cpu_map[i] = 0xff;\n" + " \n" + " \t/*\n" + "-\t * For primary GICs, skip over SGIs.\n" + "-\t * For secondary GICs, skip over PPIs, too.\n" + "-\t */\n" + "-\tif (gic_nr == 0 && (irq_start & 31) > 0) {\n" + "-\t\thwirq_base = 16;\n" + "-\t\tif (irq_start != -1)\n" + "-\t\t\tirq_start = (irq_start & ~31) + 16;\n" + "-\t} else {\n" + "-\t\thwirq_base = 32;\n" + "-\t}\n" + "-\n" + "-\t/*\n" + " \t * Find out how many interrupts are supported.\n" + " \t * The GIC only supports up to 1020 interrupt sources.\n" + " \t */\n" + "@@ -986,14 +970,31 @@ void __init gic_init_bases(unsigned int gic_nr, int irq_start,\n" + " \t\tgic_irqs = 1020;\n" + " \tgic->gic_irqs = gic_irqs;\n" + " \n" + "-\tgic_irqs -= hwirq_base; /* calculate # of irqs to allocate */\n" + "+\tif (node) {\t\t/* DT case */\n" + "+\t\tconst struct irq_domain_ops *ops = &gic_irq_domain_hierarchy_ops;\n" + "+\n" + "+\t\tif (!of_property_read_u32(node, \"arm,routable-irqs\",\n" + "+\t\t\t\t\t &nr_routable_irqs)) {\n" + "+\t\t\tops = &gic_irq_domain_ops;\n" + "+\t\t\tgic_irqs = nr_routable_irqs;\n" + "+\t\t}\n" + "+\n" + "+\t\tgic->domain = irq_domain_add_linear(node, gic_irqs, ops, gic);\n" + "+\t} else {\t\t/* Non-DT case */\n" + "+\t\t/*\n" + "+\t\t * For primary GICs, skip over SGIs.\n" + "+\t\t * For secondary GICs, skip over PPIs, too.\n" + "+\t\t */\n" + "+\t\tif (gic_nr == 0 && (irq_start & 31) > 0) {\n" + "+\t\t\thwirq_base = 16;\n" + "+\t\t\tif (irq_start != -1)\n" + "+\t\t\t\tirq_start = (irq_start & ~31) + 16;\n" + "+\t\t} else {\n" + "+\t\t\thwirq_base = 32;\n" + "+\t\t}\n" + "+\n" + "+\t\tgic_irqs -= hwirq_base; /* calculate # of irqs to allocate */\n" + " \n" + "-\tif (IS_ENABLED(CONFIG_IRQ_DOMAIN_HIERARCHY) &&\n" + "-\t\tof_find_property(node, \"arm,irq-domain-hierarchy\", NULL))\n" + "-\t\tgic->domain = irq_domain_add_linear(node, gic_irqs,\n" + "-\t\t\t\t\t&gic_irq_domain_hierarchy_ops, gic);\n" + "-\telse if (of_property_read_u32(node, \"arm,routable-irqs\",\n" + "-\t\t\t\t &nr_routable_irqs)) {\n" + " \t\tirq_base = irq_alloc_descs(irq_start, 16, gic_irqs,\n" + " \t\t\t\t\t numa_node_id());\n" + " \t\tif (IS_ERR_VALUE(irq_base)) {\n" + "@@ -1004,10 +1005,6 @@ void __init gic_init_bases(unsigned int gic_nr, int irq_start,\n" + " \n" + " \t\tgic->domain = irq_domain_add_legacy(node, gic_irqs, irq_base,\n" + " \t\t\t\t\thwirq_base, &gic_irq_domain_ops, gic);\n" + "-\t} else {\n" + "-\t\tgic->domain = irq_domain_add_linear(node, nr_routable_irqs,\n" + "-\t\t\t\t\t\t &gic_irq_domain_ops,\n" + "-\t\t\t\t\t\t gic);\n" + " \t}\n" + " \n" + " \tif (WARN_ON(!gic->domain))\n" + "-- \n" + 2.0.4 -eb92ed7050437f29c3ded314c1ab7f3894f5c4e0c57e8fdae73f09be5f2eaa31 +ddfaa4a83a096d8a8ebb16f882854bcf69b86dad3c6f2db818321e6243dcca8a
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