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Message-ID: <543F8A91.9050602@openwrt.org>
Date:   Thu, 16 Oct 2014 11:06:25 +0200
From:   John Crispin <blogic@openwrt.org>
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To:     Andrew Bresticker <abrestic@chromium.org>
CC:     Ralf Baechle <ralf@linux-mips.org>,
        Linux-MIPS <linux-mips@linux-mips.org>
Subject: Re: [PATCH 1/2] MIPS: ralink: add gic support
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Hi Andrew,

>> +static int __init
>> +of_gic_init(struct device_node *node,
>> +                               struct device_node *parent)
>> +       if (of_address_to_resource(node, 2, &gcmp))
>> +               panic("Failed to get gic memory range");
>> +       if (request_mem_region(gcmp.start, resource_size(&gcmp),
>> +                               gcmp.name) < 0)
>> +               panic("Failed to request gcmp memory");
> Ah, so this SoC has a CM2 as well.  Is it at the address reported by
> C0_CMGCRBase?  If so, then mips_cm_probe() will be able to find it and
> set it up.  Otherwise, device-tree based probing should probably be
> added to the mips-cm driver.

i change my code and made use of mips-cm. unit boots fine now and indeed
C0_CMGCRBase holds the valid address. I will look into updating the gic
code to use the generic driver once i cleaned up the remainig mt7621
patches.

i had to apply a hack to mips-cm.c to disable the "disable CM regions"
code, this deadlocked the mt7621. i will send a separate regarding this
in a sec.

    John